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NXP

DFT Verification intern

Tianjin (Teda)

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hirly's read of this role

Seniority
Internship
Country
CN
Work mode
On-site / unstated
First seen by hirly
23 Sept 2026

Derived automatically from the posting. Upload your resume above to see how the role scores against it.

the posting

  • Job Responsibility:
  • -Contribute to SoC DFT design activities by running DFT pattern simulations, static and dynamic checks and documentation.
  • -Assist with DFT AI Flow development under guidance from senior engineers.
  • -Contribute to engineering quality, learning, and teamwork throughout the development cycle.
  • Requirements:
  • -Currently pursuing a Master’s degree in Electrical Engineering, Electronics, Computer Engineering, Computer Science or a related discipline.
  • -Hands-on experience from ASIC EDA tools, SoC design projects, internships, coursework, or student competitions is a plus.
  • -Familiar with SoC digital design, verification, programming, EDA tools; willingness to learn quickly is important.
  • -Strong foundation in engineering fundamentals, problem solving, testing, and technical documentation.
  • -Able to collaborate with cross-functional teams and communicate technical ideas clearly.
  • -Good communication skills in English (written and spoken).

More information about NXP in Greater China...

#LI-6650

Original posting on NXP's site ↗

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