hirly

NXP

Lead Validation Engineer Analog

Noida

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hirly's read of this role

Seniority
Lead / management
Country
IN
Work mode
On-site / unstated
First seen by hirly
27 Sept 2026

Derived automatically from the posting. Upload your resume above to see how the role scores against it.

the posting

Job Description: Analog Validation/Characterization Engineer /Lead

Primary and Secondary Responsibilities

Develop bench characterization methodologies for A nalog /Mixed-Signal IPs across PVT combinations.

Perform Design Evaluation and Bench Characterization for Analog IPs on devices in development.

Develop and write automated code to control test equipment and process characterization data.

Provide HW requirements, review schematics and PCB layout for circuit boards with excellent signal integrity

Required Qualification & Skills

B.Tech / M.Tech . in Electronics/ Communication Engineering

8-10 years of experience in silicon validation of SOC, mixed signal/digital ICs.

Strong understanding of electrical circuit analysis, design, and test fundamentals and Debug skills

Expertise in using test & measurement equipment used in Analog Validation

Automation of Analog Characterization Setups using Python, LabView and Test Stand.

Knowledge of C/Embedded C is a must.

Bring up of Silicon & Analog Validation HW platforms like Analog Board for new ASIC/SoC design using Micro-controllers.

Strong leadership and skills to plan and deliver timely results.

Additional Preferred Qualifications

Expertise with PVT characterization of Analog IPs like ADC, DAC, PLL, OSC, LDO, LOW POWER and IO P ad s.

Good debugging exposure and root cause analysis for new analog designs.

Knowledge for Multilayer Board design, testing, integration and Signal Integrity issues.

Some understanding of differential signal l ing , transmission line theory.

Keywords

ADC, DAC, PLL, PMC, PMU, OSC, PVT, Labview , VALIDATION, Post-Silicon, HARDWARE , DESIGN, ANALOG VALIDATION, CHARACTERIZATION, Test & Measurements.

More information about NXP in India...

#LI-2734

Original posting on NXP's site ↗

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