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NXP Semiconductors

Senior Principal Analog Design Lead

Pune, Maharashtra, India

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hirly's read of this role

Role family
Design
Seniority
Lead / management
Country
IN
Work mode
On-site / unstated
First seen by hirly
29 Sept 2026

Derived automatically from the posting. Upload your resume above to see how the role scores against it.

the posting

Ro le Summary: · Define SoC analog architecture and IP requirements starting from system level specifications. · Drive circuit architectures definition and best-in-class design implementation capable of meeting R&D targets in terms of innovation, performance and reliability. · Create and ensure robust and high-quality IP from requirements. · Project leading and manager of the analog team assigned to the project. · Ownership for the implementation, simulation, layout, and validation of mixed sig…

Original posting on NXP Semiconductors's site ↗

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