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TYLsemi

Staff - SoC RTL Design Engineer (UCIE)

Bangalore, Karnataka, India

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hirly's read of this role

Seniority
Lead / management
Country
IN
Work mode
On-site / unstated
First seen by hirly
27 Sept 2026

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the posting

Role Overview We are looking for a highly skilled RTL Designer to develop high-performance, scalable, and power-efficient digital designs for next-generation SoCs and Chiplets targeting AI, HPC, and Networking applications . This role requires deep expertise in RTL design, micro-architecture, and integration of high-speed interfaces, along with a strong focus on quality, performance, and first-time silicon success . What You’ll Do Specify and own the reset sequencing architecture. Own the secur…

Original posting on TYLsemi's site ↗

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