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Renesas Electronics

Staff/ Sr Staff Engineer, STA

Bangalore, Karnataka, India

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hirly's read of this role

Role family
Engineering
Seniority
Lead / management
Country
IN
Work mode
On-site / unstated
First seen by hirly
28 Sept 2026

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the posting

Job Description We are seeking a seasoned Backend Design Expert specializing in Static Timing Analysis (STA) and Logic Synthesis . You will own the RTL-to-Gate conversion, constraint development, and final timing closure, ensuring our chips deliver maximum performance at the lowest possible power and area. Key Responsibilities Physical-Aware Synthesis and PPA optimization: Own and execute hierarchical synthesis flows to translate SystemVerilog RTL into optimized gate-level netlists. Execute phy…

Original posting on Renesas Electronics's site ↗

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