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NXP

Stage ingénieur : Conception circuits analogiques: Etude du buffer pour une référence de tension ultra précise et invariable dans le temps (F/M)

Toulouse

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hirly's read of this role

Seniority
Mid level
Country
FR
Work mode
On-site / unstated
First seen by hirly
29 Sept 2026

Derived automatically from the posting. Upload your resume above to see how the role scores against it.

the posting

Au sein du centre de développement de circuits intégrés destinés aux applications de batteries pour véhicules électriques, le(a) stagiaire prendra en charge/réalisera les missions suivantes :

  • Etude et compréhension des références de tensions existantes et utilisées
  • Etude des différentes solutions de buffer existantes : performances de précision, taille du bloc, consommation et détermination du meilleur compromis
  • Conception et Simulation dans l’environnement Cadence et utilisation de nos outils de simulation (Equivalent de Spice pour les circuits)

The intern will be responsible for the following tasks:

  • Study and gain a thorough understanding of the existing voltage reference circuits currently in use.
  • Evaluate the different buffer solutions available, including their accuracy performance, area, and power consumption, and identify the best trade-off.
  • Design and simulate circuits in the Cadence environment, using our simulation tools (SPICE-equivalent tools for integrated circuit design).

More information about NXP in France...

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Original posting on NXP's site ↗

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