This role has closed. Infosys has taken the posting down.
hirly last saw it live on 30 September 2026. See similar open roles below, or browse all jobs in Hyderabad.
Infosys
Analog Layout
Hyderabad, India
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hirly's read of this role
- Seniority
- Mid level
- Country
- IN
- Work mode
- On-site / unstated
- First seen by hirly
- 27 Sept 2026
Derived automatically from the posting.
the posting
Responsibilities
A day in the life of an Infoscion
As part of the Infosys delivery team, your primary role would be to interface with the client for quality assurance, issue resolution and ensuring high customer satisfaction.
You will understand requirements, create and review designs, validate the architecture and ensure high levels of service offerings to clients in the technology domain.
You will participate in project estimation, provide inputs for solution delivery, conduct technical risk planning, perform code reviews and unit test plan reviews.
You will lead and guide your teams towards developing optimized high quality code deliverables, continual knowledge management and adherence to the organizational guidelines and processes.
You would be a key contributor to building efficient programs/ systems and if you think you fit right in to help our clients navigate their next in their digital transformation journey, this is the place for you!
If you think you fit right in to help our clients navigate their next in their digital transformation journey, this is the place for you!
Technical requirements
Responsible for Design and development of critical analog, mixed-signal, and full chip level integration support.
Perform layout verification like LVS/DRC/Antenna, quality check and documentation.
Responsible for on-time delivery of block-level layouts with acceptable quality.
Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation, and execution to meet project schedule/milestones in multiple project environment.
Guide junior team-members in their execution of Sub block-level layouts & review their work.
Additional responsibilities
3 + year experience in analog/custom layout design in advanced CMOS process.
Expertise in Cadence Virtuoso L/VXL and Calibre DRC/LVS is a must.
SKILL/Perl scripting is a plus.
Should have hands on experience of Critical Analog Layout design of blocks such as Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc.,
Good understanding of Analog Layout fundamentals (e.g. Matching, Electro-migration, Latch-up, coupling, cross-talk, IR-drop, active and passive parasitic devices etc.)
Understanding layout effects on the circuit such as speed, capacitance, power, and area etc.,
Ability to understand design constraints and implement high-quality layouts.
Excellent verbal and written communication skills.
Education
Master Of Engineering,Master Of Technology,Bachelor of Engineering,Bachelor Of Technology