This role has closed. Capgemini Engineering has taken the posting down.
hirly last saw it live on 28 September 2026. See similar open roles below, or browse all jobs in Bengaluru.
Capgemini Engineering
RTL Design (UCIe/PCIe) Architect
Bangalore, IN
Similar open jobs
- RTL Design EngineerSmartSoC Solutions Pvt Ltd · Bangalore, Karnataka, IndiaFirst seen yesterday
- RTL Design Lead - IP DesignAMD · Bangalore, Karnataka, IndiaFirst seen yesterday
- Microarchitect / RTL Design - Interconnect & FabricArchitect Labs · Palo AltoFirst seen yesterday
- Microarchitect / RTL Design - Memory SubsystemArchitect Labs · Palo AltoFirst seen yesterday
- Staff - SoC RTL Design Engineer (UCIE)TYLsemi · Bangalore, Karnataka, IndiaFirst seen 2d ago
- SOC RTL Design EngineerSec · SSIR, Goldstone, Bangalore, IndiaFirst seen 2d ago
- RTL Design EngineerSec · SSIR, Goldstone, Bangalore, IndiaFirst seen 2d ago
- Senior / Lead / Principal RTL Design EngineerLeadSoc Technologies Pvt Ltd · Bangalore, Karnataka, IndiaFirst seen 3d ago
- RTL Design (SOC) Engineer-StaffQualcomm · Bangalore, Karnataka, IndiaFirst seen 5d ago
- Microarchitect and RTL Design EngineerBayasystems · Bengaluru, Karnataka, IndiaFirst seen 19d ago
- Senior DRAM RTL design engineerMicron · Hyderabad - Phoenix Aquila, IndiaFirst seen 2d ago
- System IP RTL Design LeadTenstorrent · Bengaluru, Karnataka, IndiaFirst seen 23d ago
- RTL Design Lead/IC Front-End Architect/Datapath LeadLumilens · Bengaluru, IndiaFirst seen 28d ago
- RTL Design EngineerSnapchat · Eindhoven - NetherlandsFirst seen today
- RTL Design ArchitectCapgemini Engineering · Bangalore, INFirst seen today
hirly's read of this role
- Seniority
- Mid level
- Country
- IN
- Work mode
- On-site / unstated
- First seen by hirly
- 27 Sept 2026
Derived automatically from the posting.
the posting
Job Description
Your Role
Lead architecture, integration, and verification strategy for high-speed connectivity IPs and chiplet interconnect solutions.
- Define PCIe/CXL/ UCIe subsystem architecture.
- Drive protocol compliance strategy.
- Review integration architecture and performance requirements.
- Lead interoperability and compliance planning.
- Guide verification and validation teams.
- Interface directly with customer architects.
- Support roadmap and future standard adoption.
Your Profile
- 12–20+ years in protocol/IP development.
- Deep expertise in PCIe Gen4/5/6.
- UCIe architecture expertise.
- Chiplet ecosystem experience.
- Strong knowledge of protocol stack and LTSSM.
- Experience with root complex, endpoint, switch architectures.
- Experience integrating PCIe into large SoCs.
- Strong architecture and verification background.
- Knowledge of SerDes architecture.
Good to Have
- CXL protocol knowledge.
- HBM integration.
- Protocol compliance testing.
- System-level performance modeling.
What You’ll Love About Working Here
- Opportunity to work on high-speed connectivity IPs.
- Collaborative work environment with focus on innovation and professional growth.
- Continuous learning opportunities to enhance technical and domain expertise.
About Capgemini in India
Capgemini is an AI‑powered global business and technology transformation partner, helping organizations realize their future through technology, data, and people. With nearly 60 years of heritage , Capgemini is a responsible and diverse organization with 420,000 team members across more than 50 countries . The Group reported global revenues of €22.1 billion in 2024 .
Capgemini in India comprises nearly 235,000 team members working across 13 locations , including Bengaluru, Chennai, Hyderabad, Mumbai, Pune, Noida, Gurugram, and more. We deliver end‑to‑end services across strategy, technology, engineering, and operations .
Make it real | www.capgemini.com/in ‑en