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company hiring page

Jobs at Astera Labs

Astera Labs has 180 open roles on its own career site, as read by hirly on 2 October 2026 — most of them in United States, Israel, India.

Last updated 2 October 2026 · Astera Labs's career site (opens in a new tab)

Open roles: 180
New, last 7 days: 14
New, last 30 days: Not enough history
Say remote: 0%

A role is new on the date its posting gives, and never before hirly first saw it; where a posting gives no date, on the day hirly first saw it. hirly has read Astera Labs's career site since 10 September 2026; where that is not yet long enough to tell new roles from ones that were already there, or the site dates only some of its postings, no figure is shown.

Compared with four weeks ago

No trend yet: hirly compares today with its own count from 28 days ago, and shows one only when it has a daily record that long for at least 20 open roles. It has read this career site since 10 September 2026.

By kind of work

Engineering14
Product management13
Operations6
Design4
Supply chain3
HR2
Engineering management1
Finance1
Other roles136

By country

United States95
Israel28
India20
Taiwan13
Canada8
China7
Germany5
Singapore2

By place

San Jose, California, United States84
Tel Aviv-Yafo, Tel Aviv District, Israel19
Bengaluru, Karnataka, India17
Taipei, Taiwan13
San Jose, CA7
Shanghai Shi, China6
Toronto, Ontario, Canada6
Israel5

By level

Lead / management115
Mid level or not stated26
Senior18
Director16
Executive2
Internship2
Entry level1

Stated pay

$185,000 – $209,000 a year

Median low and high of the 33 of 180 postings that state an annual salary in USD. The rest state no annual salary in USD.

Newest open roles at Astera Labs

Newest 50 of 180

Senior Principal Test Engineer
San Jose, California, United States
Posted 1 Oct
Senior Principal Executive Recruiter
San Jose, California, United States
Posted 30 Sept
Principal Engineer - Validation Engineering
San Jose, California, United States
Posted 30 Sept
Tech Lead, Digital Design Engineer
San Jose, California, United States
Posted 30 Sept
Principal Logic Design Engineer
Bengaluru, Karnataka, India
Posted 30 Sept
Senior Principal Physical Design Engineer
Bengaluru, Karnataka, India
Posted 30 Sept
Principal Verification Engineer
San Jose, California, United States
Posted 29 Sept
Tech Lead, Analog Mixed Signal Layout
Ho Chi Minh City, Vietnam
Posted 29 Sept
AE| Principal Product Application Engineer (Scorpio)
San Jose, California, United States
Posted 29 Sept
Senior Digital Design Engineer
San Jose, California, United States
Posted 28 Sept
Senior Design Verification Engineer
San Jose, California, United States
Posted 28 Sept
Tech Lead Engineer, Design Verification
San Jose, California, United States
Posted 28 Sept
Senior Principal Program Manager, Business Acceleration
San Jose, California, United States
Posted 25 Sept
Principal Analog Mixed-Signal Design Engineer
Toronto, Ontario, Canada
Posted 25 Sept
Principal Analog Mixed-Signal Design Engineer
Irvine, California, United States
Posted 25 Sept
Principal Field Applications Engineer
Shanghai Shi, China
Posted 24 Sept
Senior Packaging Integration Lead
San Jose, California, United States
Posted 22 Sept
Silicon Digital IP / Subsystem Architect
Bengaluru, Karnataka, India
Posted 22 Sept
Principal Product Applications Engineer
Shanghai Shi, China
Posted 22 Sept
Design Verification Tech Lead- SerDes/PHY IP
San Jose, California, United States
Posted 21 Sept
DFT Engineer
Bengaluru, Karnataka, India
Posted 21 Sept
Principal Analog Mixed-Signal Design Engineer
Ho Chi Minh City, Vietnam
Posted 18 Sept
Tech Lead PCB Layout Engineer
Shanghai Shi, China
Posted 18 Sept
Senior Manager, Digital Design
San Jose, California, United States
Posted 17 Sept
Principal Logic Design Engineer - UALink IP/Subsystem
Bengaluru, Karnataka, India
Posted 17 Sept
Lead Logic Design Engineer
Bengaluru, Karnataka, India
Posted 17 Sept
Senior System Validation Engineer
Tel Aviv-Yafo, Tel Aviv District, Israel
Posted 16 Sept
Digital Design Manager
Toronto, Ontario, Canada
Posted 15 Sept
Tech Lead, STA
Hyderabad, Telangana, India
Posted 15 Sept
Principal / Senior Principal Design Verification Engineer- CXL / PCIe / Ethernet
San Jose, California, United States
Posted 14 Sept
Principal / Senior Principal Design Verification Engineer- CXL / PCIe / Ethernet
Taipei, Taiwan
Posted 14 Sept
Principal/ Sr Principal Digital Design Engineer
Taipei, Taiwan
Posted 14 Sept
Principal/ Sr.Principal Digital Design Engineer
San Jose, California, United States
Posted 14 Sept
Principal Digital Design Engineer
San Jose, California, United States
Posted 14 Sept
Principal Digital Design Engineer
Taipei, Taiwan
Posted 14 Sept
Principal Advanced Packaging Engineer
San Jose, California, United States
Posted 14 Sept
Principal Advanced Packaging Engineer
Taipei, Taiwan
Posted 14 Sept
Manager Design Verification
Tel Aviv-Yafo, Tel Aviv District, Israel
Posted 14 Sept
Senior Design Verification Engineer
Toronto, Ontario, Canada
Posted 11 Sept
Principal Analog Mixed-Signal Design Engineer
San Jose, California, United States
Posted 11 Sept
Senior STA Engineer
Ahmedabad, Gujarat, India
Posted 11 Sept
Senior Digital Design Engineer
Toronto, Ontario, Canada
Posted 10 Sept
Process Engineer Cleaning & Coating /Day Shift
Aachen, North Rhine-Westphalia, Germany
Posted 10 Sept
Test Engineer
Aachen, North Rhine-Westphalia, Germany
Posted 10 Sept
Principal Emulation Engineer
San Jose, California, United States
Posted 9 Sept
Principal Package Signal & Power Integrity
San Jose, California, United States
Posted 9 Sept
Site HR China
Shanghai Shi, China
Posted 8 Sept
Principal Product Manager, Fiber Connectivity
San Jose, California, United States
Posted 2 Sept
Firmware Engineer Tech Lead
Bengaluru, Karnataka, India
Posted 1 Sept
Principal Design Verification Engineer- SerDes/PHY IP
San Jose, California, United States
Posted 31 Aug

One row per title and place. See every role on Astera Labs's career site (opens in a new tab).

Where these numbers come from

From Astera Labs's own career pages, read by hirly every six hours. Counts are what hirly has seen there, not the company's official numbers: a role posted in several places is counted once per posting, and a role the company never posted on its career site is not counted. hirly has read this career site since 10 September 2026. hirly is not affiliated with Astera Labs.

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