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NXP

Analog Design Engineer

Toulouse · Milan

hirly's read of this role

Seniority
Mid level
Countries
FR, IT
Work mode
On-site / unstated
First seen by hirly
2 Sept 2026

Derived automatically from the posting.

the posting

Job Summary

NXP Semiconductors France SAS is seeking an Analog Design Engineer to contribute to the development of innovative analog circuits for high-performance mixed-signal integrated circuits. This role involves designing, simulating, and verifying critical analog blocks for next-generation products.

Job Responsibilities

  • Design, simulate, and verify analog circuits such as ADCs, DACs, PLLs, LDOs, amplifiers, and bandgap references.
  • Perform schematic capture, layout supervision, and post-layout simulations to ensure performance and robustness.
  • Collaborate with digital design, layout, test, and system engineering teams throughout the product development lifecycle.
  • Conduct detailed design reviews and contribute to technical documentation.
  • Analyze and resolve design issues, including silicon debug and characterization.
  • Contribute to the definition of new product architectures and specifications.
  • Stay updated on the latest analog design methodologies, tools, and industry trends.

Job Qualifications

  • Master's degree or PhD in Electrical Engineering or a related field.
  • Proven experience (typically 3+ years) in analog IC design, with a strong portfolio of successful designs.
  • In-depth knowledge of analog circuit design fundamentals and advanced concepts.
  • Proficiency with industry-standard EDA tools (e.g., Cadence Virtuoso, Spectre, Hspice).
  • Experience with advanced semiconductor process technologies (e.g., deep submicron CMOS).
  • Strong understanding of mixed-signal integration challenges and solutions.
  • Excellent analytical, problem-solving, and debugging skills.
  • Ability to work independently and as part of a multi-disciplinary team.
  • Good communication skills in English, both written and verbal.

More information about NXP in France...

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Original posting on NXP's site ↗

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