Electrical Engineer Manager - Configurable Logic Section Leader

Date Posted:

2026-09-01

 Country:

United States of America

 Location:

US-TX-MCKINNEY-513WM ~ 2501 W University Dr ~ WING M BLDG

 Position Role Type:

Onsite

 U.S. Citizen, U.S. Person, or Immigration Status Requirements:

The ability to obtain and maintain a U.S. government issued security clearance is required.​ U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance

 Security Clearance Type:

DoD Clearance: Secret

 Security Clearance Status:

Active and existing security clearance required after day 1

The Multi-Product Power & Digital (MPD) department designs FPGAs, circuit cards, and electronics subassemblies for a range of products including missiles/effectors, radars, and electronic warfare systems. The team leverages digital, analog, and power design skills to provide support throughout the product lifecycle from architecture and design through production and sustainment.

The MPD department is seeking an Electrical Engineering Manager to join our team as a configurable logic section leader.

This position is an onsite in McKinney, TX.

We are looking for candidates who are eager to collaborate, innovate, and work alongside our talented engineering teams. In this role, the Section Leader will exhibit advanced technical knowledge in FPGA design and/or verification and understand the impact of this work on other areas of the organization. The candidate will work with section members to provide career guidance, performance feedback, and technical leadership to enable the employee for success. Responsibilities will be split between supporting program(s) as a contributing engineer (~75%) and providing functional leadership to the section (~25%).

What To Expect

As a functional leader, the section manager will add the following responsibilities to his or her program role:

• •Manage a section of 15 to 20 engineers.
• •Drive results with a strong work ethic
• •Apply active listening, empathy, and conflict resolution
• •Enable career development for direct reports
• •Develop training curricula, provide technical and process mentoring, and leadership skill development
• •Lead functional and cross-disciplinary teams to meet organizational goals and project needs through team leadership
• •Support program staffing needs working with program leadership.
• •Support hiring (resume reviews, interviews, etc.) and annual compensation planning
• •Elicit and compile performance feedback to support Performance Impact
• •Hold required Performance Discussions (PD) where compiled feedback, key strengths and development needs are conveyed
• •Work closely with other section managers, the department manager, the program management office, senior managers, senior staff engineers, systems engineers, and other development team members
• •Ensure labor charging accuracy compliance

The engineering responsibilities for this position include:

• •Provide full lifecycle support of production quality FPGA designs for all major vendors and device families including: AMD (Xilinx), Altera, and Microchip (Microsemi) using tools such as AMD Vivado, Altera Quartus Prime Pro or Libero.
• •Generate FPGA designs for the following applications: gigabit and multigigabit transceiver (MGT) serial interfaces, Radio Frequency (RF) DSP, controls, data links, embedded processing and processor interfaces.
• •Translate system level requirements into FPGA requirements
• •Architect FPGA-based systems to determine parts, interfaces, and Concept of Operations (CONOPS)
• •Lead small teams of FPGA engineers and code in VHDL for reliability and maintainability
• •Verify designs utilizing self-checking techniques with directed and constrained random tests, while tracking functional and code coverage
• •Define schedules for FPGA tasking and drive execution to the planned budget and schedule.
• •Identify and manage project risks and opportunities.
• •Create complete documentation including requirements, verification plan, and user’s guides
• •Lead medium sized teams to success.
• •Coach, review, and delegate work to junior engineers.
• •Serve as a subject-matter expert within discipline.
• •Lead internal and external technical reviews.
• •Support customer interactions and relations.
• •Contribute to product and technology roadmaps
• •Make improvements to processes, systems or products to enhance overall performance
• •Engage in personal technical growth and facilitate technical growth in peers and junior engineers.

Qualifications You Must Have

• •Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and a minimum of 8 years of prior relevant experience
• •Experience to include one or more of the following:
• •FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
• •Experience with AMD (Xilinx), Altera and/or Microchip (Microsemi) devices and with tools such as AMD Vivado, Altera Quartus Prime Pro or Libero.
• •Hands on experience with integration and debug of FPGA/ASIC in a lab environment
• •Experience with timing closure, clock domain crossing and reset domain crossing analysis, and constraint development.
• •Experience with source code management, design reviews, and code release in a team development environment.

Qualifications We Value

• •One or more advanced degrees in Electrical Engineering or a related Science, Technology, Engineering, or Mathematics (STEM) major. A suitable degree may be counted as 2 years of work experience.
• •FPGA/ASIC design experience in one or more of the following areas:
• •Radar processing techniques
• •Image processing techniques for visual and infrared sensors
• •Embedded systems design using ARM, Microblaze, or NIOS processors
• •Gigabit serial interfaces and multi-gigabit transceivers (MGTs)
• •Constrained random verification in UVM using System Verilog
• •Verification utilizing emulation platforms, such as Veloce
• •Experience with High Level Synthesis (HLS)
• •Experience with vector processors and/or GPUs
• •Using AI to improve FPGA workflows (verification automation, log triage, regression analytics)
• •AI/ML inference on FPGA (Vitis AI, FINN, custom accelerators)

• •Experience managing technical, cost, and schedule risks and opportunities.
• •Experience with project management tools such as Earned Value and/or Agile Execution.
• •Experience communicating and documenting technical topics and presenting to customers and management.
• •Experience leading a program transition from development to production.
• •Proposal development experience.
• •Experience with intellectual property generation (patents & publications).
• •Demonstrated mentorship of junior engineers.

What We Offer

Our values drive our actions, behaviors, and performance with a vision for a safer, more connected world. At RTX we value: Trust, Respect, Accountability, Collaboration, and Innovation.

This position offers relocation based on candidate eligibility.

Learn More & Apply

This position requires a security clearance. DCSA Consolidated Adjudication Services (DCSA CAS), an agency of the Department of Defense, handles and adjudicates the security clearance process. More information about Security Clearances can be found on the US Department of State government website here: https://www.state.gov/m/ds/clearances/c10978.htm

North Texas: https://careers.rtx.com/global/en/raytheon-north-texas-location

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As part of our commitment to maintaining a secure hiring process, candidates may be asked to attend select steps of the interview process in-person at one of our office locations, regardless of whether the role is designated as on-site, hybrid or remote.

The salary range for this role is 107,500 USD - 204,500 USD. The salary range provided is a good faith estimate representative of all experience levels. RTX considers several factors when extending an offer, including but not limited to, the role, function and associated responsibilities, a candidate’s work experience, locatio