This role has closed. Marvell has taken the posting down.
hirly last saw it live on 21 October 2026. See similar open roles below, or browse all jobs in Austin.
Marvell
Ph.D. Intern - AI/ML & Design Automation
Santa Clara, CA · Irvine, CA · Austin, TX · Morrisville, NC · Westlake Village, CA · Chandler, AZ · Westborough, MA · Burlington, VT · Boise, ID
Similar open jobs
- R&D Intern - Summer 2027 - Farmington Hills, MI or Stanfield, AZAlliance · Farmington Hills, Michigan - United States of AmericaFirst seen 8d ago
- R&D InternAkamerica · Glenview, ILFirst seen 11d ago
- R&D Intern (Summer 2027)Elanco · Indianapolis, INFirst seen 15d ago
- R&D InternBdx · USA UT - Salt Lake City BASFirst seen 15d ago
- R&D Intern - Wireless Systems Engineer - 2026Motorolasolutions · Los Angeles, CAFirst seen 21d ago
- R & D InternSaputo · Waupun, WIFirst seen 24d ago
- R & D InternSaputo · White Bear Lake, MNFirst seen 24d ago
- R&D Intern - Summer 2027Aerospace · United StatesFirst seen 27d ago
- R&D Intern - Summer 2027 (U.S. Person Required)Aerospace · United StatesFirst seen 27d ago
- R&D InternHbfuller · South Bend, Indiana, USAFirst seen 27d ago
- R&D InternEnovix · Fremont CA, USFirst seen 27d ago
- R&D InternAgropur · 3 LocationsFirst seen 27d ago
- R&D InternSelect Division Career Page · Tulare, CAFirst seen 28d ago
- PhD R&D Intern — Emotion & Sensory Experience ResearchPg · MASON BUS AND INNOVATION CTRFirst seen 39d ago
- TS&D Intern (Summer 2027)Hydritechemicalco · Milwaukee, WIFirst seen 43d ago
hirly's read of this role
- Seniority
- Internship
- Country
- US
- Work mode
- On-site / unstated
- First seen by hirly
- 13 Sept 2026
Derived automatically from the posting.
the posting
About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
Marvell is building the silicon that makes AI possible — the custom XPUs, the 224G and 448G SerDes, the Silicon Photonics interconnects, the co-packaged optics platforms that hyperscalers depend on to train and deploy the world's most advanced models. Designing that silicon at the pace and complexity the AI era demands requires more than engineering talent. It requires intelligence applied to the design process itself. Marvell's AI and machine learning teams are working on exactly that — using AI to accelerate how silicon is designed, verified, and deployed, and building the enterprise AI infrastructure that makes Marvell's engineering organization faster and smarter at every level.
This Ph.D. intern pool spans two distinct but connected tracks. The first is hardware-focused: applying ML and AI techniques directly to chip design challenges — EDA automation, design space exploration, predictive modeling for timing and power, and AI-driven approaches to physical design and verification at advanced process nodes. The second is enterprise-focused: building and deploying the internal AI tools and platforms — including large language model integrations, agentic workflows, and AI-assisted engineering systems — that Marvell's global engineering teams use every day. Both tracks sit at the frontier of what applied AI research looks like in a production semiconductor environment, and both are grounded in problems that do not yet have off-the-shelf solutions.
Marvell's Ph.D. Intern Program places doctoral candidates directly inside these active efforts, working on problems that are inseparable from their academic research. The work done here is the applied dimension of doctoral research in machine learning, computer science, and electrical engineering — conducted at production scale, on real design data, with real consequences for the silicon that ships to the world's largest AI infrastructure operators. What you will take away is something no coursework or academic dataset can replicate: the experience of deploying your research inside one of the most complex engineering environments in the semiconductor industry.
What You Can Expect
Track 1 — AI/ML for Hardware & Chip Design
As our Ph.D. AI/ML Intern on the hardware track, every day you will apply machine learning research to real chip design problems across Marvell's advanced silicon development flow. Specifically, you can expect to:
Develop and apply ML models — including graph neural networks, reinforcement learning, and generative approaches — to chip design tasks such as placement, routing, timing closure, power estimation, and design rule checking
Work directly with production EDA tool flows and real design data from active tapeouts in 3nm and 2nm FinFET and Gate-All-Around processes
Build predictive models that reduce design iteration cycles and improve first-pass silicon success rates
Collaborate with analog, digital, and physical design engineers to identify high-value automation targets and validate model outputs against ground-truth silicon results
Present research findings and model performance to engineering leadership and contribute to internal technical documentation
Track 2 — Enterprise AI Tools & Implementation
As our Ph.D. AI/ML Intern on the enterprise tools track, every day you will work on the deployment and integration of large language models and agentic AI systems into Marvell's engineering workflows. Specifically, you can expect to:
Design, implement, and evaluate LLM-based tools and agentic workflows — including systems built on models such as Claude — for use by Marvell's global engineering and operations teams
Build retrieval-augmented generation (RAG) pipelines, fine-tuning workflows, and prompt engineering frameworks grounded in Marvell's internal knowledge and tooling ecosystem
Evaluate model performance, safety, and reliability in production enterprise environments and iterate based on real user feedback from engineering teams
Collaborate with IT, security, and engineering stakeholders to ensure responsible and scalable AI deployment across the organization
Present implementation results and adoption metrics to cross-functional leadership
What We're Looking For
To thrive in this role, you must have hands-on experience building and deploying machine learning systems — not just academic familiarity with the theory. Specifically:
Currently enrolled in a Ph.D. program in Computer Science, Electrical Engineering, Data Science, or a related field, with a research focus in machine learning, AI systems, or a related area
Demonstrate applied experience training, evaluating, and deploying ML models using frameworks such as PyTorch or TensorFlow
Write production-quality Python; familiarity with version control (Git) and software development best practices is required
Apply rigorous experimental methodology — you design experiments, measure results, and draw defensible conclusions from data
Communicate technical work clearly to both research and engineering audiences — you will present your work and defend your approach to the teams you work with
Track 1 — Additional Requirements
Coursework or research experience in VLSI design, digital or analog circuit design, computer architecture, or EDA — sufficient to understand the design problems your models are solving
Familiarity with graph-based ML methods (GNNs), reinforcement learning, or generative models applied to structured engineering data
Exposure to EDA tools or chip design flows (Cadence, Synopsys, or equivalent) is a strong plus
Track 2 — Additional Requirements
Design and implement agentic GenAI systems with demonstrated experience across the full stack — LLMs, multimodal models, RAG pipelines, and agentic protocols such as MCP and A2A
Apply hands-on knowledge of SOTA architectures and frameworks including transformers, diffusion models, and orchestration tools such as LangChain, LangGraph, AutoGen, CrewAI, LlamaIndex, or Hugging Face
Benchmark and evaluate model performance rigorously — you identify failure modes, propose enhancements, and back conclusions with data
Preferred Qualifications — Track 2
Experience with agentic reasoning, planning, and tool-use patterns in multi-agent orchestration frameworks such as n8n or AutoGen
Exposure to end-to-end data pipeline development and model deployment in collaboration with data engineering or platform teams
Demonstrated ability to independently research and implement concepts from current AI literature and apply them in a working system
Expected Base Pay Range (USD)
37 - 73, $ per hour.
The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.


 Additional Compensation and Benefit Elements
Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights for our interns: medical, dental, and vision coverage, perks and discounts, robust mental health resources to prioritize emo
Listed on hirly, a job board. hirly is not the employer: Marvell is hiring for this role.