Cisco
Senior Hardware Post-Silicon Validation Engineer (Hybrid)
San Jose, California, US
Get past the screening software and onto a recruiter's desk
hirly rewrites your resume for this job — matching the keywords and skills in the posting, moving your most relevant experience to the top, and writing a cover letter to fit. About 30 seconds.
- Keywords matched to this posting
- Fit score before you apply
- Cover letter included
Matched against 2.4M live jobs from 200,000+ employers in 200+ countries.
Tailor my resume for this job →Apply from your AI assistant
Connect hirly to Claude and ask it to apply to this job. hirly tailors your resume, fills the employer’s form and asks before sending. ChatGPT: manual setup today.
Some employer sites stop an application at a CAPTCHA or sign-in and hand it back with a link. Applying needs a paid plan. Works with any assistant that supports MCP.
hirly's read of this role
- Seniority
- Senior
- Country
- US
- Work mode
- On-site / unstated
- First seen by hirly
- 27 Sept 2026
Derived automatically from the posting. Upload your resume above to see how the role scores against it.
the posting
The application window is expected to close on: 09/30/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received .
This position requires that you live within commuting distance of our San Jose, CA office and commute to the office at least 4-5 days per week.
Meet the Team
The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms—like Silicon One—are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.
Cisco Silicon One (#CiscoSiliconOne) is a business organization with a long track record of building complex and high-performance Silicon ASICs. Our silicon devices drive the world’s most complex networks and carry over 90% of IP traffic. Cisco Silicon One is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio.
Welcome to the Post-Silicon Validation Team at Cisco! Our group offers a unique combination of a startup culture with the benefits of working for the leading networking company in the world. You will engage in dynamic collaboration with verification engineers, designers, and cross-functional teams, working together to ensure the successful verification of the ASIC throughout its lifecycle.
Operating at the forefront of technology, we work with cutting-edge, high-speed, and power-hungry devices. Our small, but highly influential team thrives in this challenging environment, leveraging our expertise to impact the future of networking technology. With a commitment to excellence and a passion transformative technology, we are shaping the future of high-performance Networking and delivering unparalleled value in every project we undertake. Join us and be a part of a team where professionalism meets impact.
Your Impact
We are seeking a Hardware Post-Silicon Validation Engineer with deep expertise in lab-intensive hardware validation to test and debug of high-performance networking silicon. This role is heavily focused on hands-on work in silicon validation labs, driving early-silicon bring-up, performing advanced electrical and protocol measurements, and owning end-to-end root-cause analysis of silicon, package, and board-level issues. The position offers significant technical ownership, cross-functional influence, and exposure to complex networking ASICs and high-speed interfaces.
Key Responsibilities
Lead hands-on post-silicon electrical validation in lab environments for networking ASICs and evaluation platforms
Own early-silicon bring-up activities from first power-on through feature enablement
Define, execute, and refine detailed hardware validation plans covering functionality characterization, performance, and reliability
Drive validation readiness, lab infrastructure setup, and test coverage strategy
Lead power-on sequencing, reset strategy validation, clock bring-up, and strap configuration
Perform in-depth voltage, current, power integrity (PDN), and signal integrity analysis
Capture, analyze, and interpret waveforms, eye diagrams, jitter, BER, PDN measurements, power supply stability and noise.
Independently isolate and root-cause silicon, package, board, or signal integrity issues
Lead validation of Ethernet MAC/PHY and high-speed interfaces such as PCIe and SerDes
Oversee packet-level validation using traffic generators and protocol analyzers
Validate system-level behavior under real-world networking workloads
Advanced-level operation of oscilloscopes, logic analyzers, VNAs, protocol analyzers, BERTs, and multimeters
Develop and maintain lab automation using scripts and frameworks (e.g., Python)
Plan and execute thermal testing using chambers and chillers across operating ranges
Minimum Qualifications
Bachelor's degree in Electrical Engineering, Computer Engineering, or related field and 6+ years of experience in post-silicon electrical validation, hardware bring-up and lab-based silicon debug, or Master's degree in Electrical Engineering, Computer Engineering, or related field and 3+ years of experience in post-silicon electrical validation, hardware bring-up and lab-based silicon debug, or PhD in Electrical Engineering, Computer Engineering, or related field and 1+ years of experience in post-silicon electrical validation, hardware bring-up and lab-based silicon debug.
Experience in electronics, digital logic, signal integrity, and power integrity
Experience in high-speed measurement techniques (eye diagrams, BER, jitter, compliance testing)
Experience with interfaces such as DDR5, USB 3.x, SGMII, PCIe, USB2.0, eMMC, SPI, MDIO, I2C, and UART
Experience with Reading and Reviewing schematics and layout files for complex boards
Preferred Qualifications
Experience working independently, lead, plan and execute lab-based debug efforts
Hands-on experience with silicon bring-up and post-silicon validation labs
Experience validating Ethernet, PCIe, and SerDes interfaces
Scripting skills for lab automation and data analysis (Python preferred)
Understanding of networking fundamentals and packet-based systems
Why Cisco?
At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.
Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.
We are Cisco, and our power starts with you.
Message to applicants applying to work in the U.S. and/or Canada:
The starting salary range posted for this position is $167,700.00 to $245,200.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.
Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.
U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.
U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:
10 paid holidays per ful
Similar jobs
- Senior Battery Systems Simulation & Validation EngineerPivotal · Palo Alto, CAFirst seen today
- Principal Engineer - Validation EngineeringAsteralabs · San Jose, California, United StatesFirst seen 2d ago
- Senior Validation EngineerMyhrabc · Conshohocken, PAFirst seen 2d ago
- 6468 - Senior CQV Engineer / Senior Validation EngineerVeristainc · Devens, MassachusettsFirst seen 2d ago
- Validation Engineer III - OSD/Packaging/AVIThermofisher · Greenville, North Carolina, USAFirst seen 3d ago
Browse similar roles
Want this one?
Upload your resume and hirly rewrites it for this job and writes the cover letter — in about thirty seconds, before you sign up.
Tailor my resume for this job