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Adtran

Senior Layout Engineer (M/F/D)

Berlin, Germany

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hirly's read of this role

Seniority
Senior
Country
DE
Work mode
On-site / unstated
First seen by hirly
27 Sept 2026

Derived automatically from the posting. Upload your resume above to see how the role scores against it.

the posting

Welcome!

Our Growth is Creating Great Opportunities!

Our team is expanding, and we want to hire the most talented people we can. Continued success depends on it! Once you've had a chance to explore our current open positions, apply to the ones you feel suit you best and keep track of both your progress in the selection process, and new postings that might interest you!

Thanks for your interest in working on our team!

At Adtran , we are helping shape the future of communications through innovative semiconductor and optical networking technologies. Our teams develop high-performance solutions that enable faster, more efficient, and more scalable networks for data center, telecom, and cloud infrastructure applications. We are looking for a talented Senior Layout Engineer (M/F/D) to join our IC design team and contribute to the development of next-generation optical transceiver solutions .

In this role, you will work alongside circuit and system designers to deliver high-quality physical layout for advanced SiGe BiCMOS and CMOS integrated circuits used in optical communication products. This is an excellent opportunity for an engineer who enjoys hands-on technical work, thrives in a collaborative environment, and is excited to contribute to cutting-edge high-speed analog and mixed-signal designs.

Principle duties and essential functions

Develop full-custom layout for high-speed analog and mixed-signal IC blocks in SiGe BiCMOS and CMOS technologies

Support the implementation of layouts for optical transceiver building blocks , including transmit, receive, bias, clocking, and other supporting circuits

Work closely with circuit designers to optimize layout for performance, matching, parasitics, area, and manufacturability

Perform and support physical verification, including DRC, LVS, ERC, and parasitic extraction

Contribute to floorplanning, block integration, and layout quality improvement across the design flow

Apply sound engineering judgment to ensure robust and reliable layout solutions for high-speed products

Knowledge and experience required

Master’s degree in Electrical Engineering or a related field

Minimum of 5 years experience in IC layout

Hands-on experience with full-custom layout in SiGe BiCMOS and CMOS

Exposure to high-speed analog/mixed-signal design , ideally in optical transceiver or related communication applications

Familiarity with layout considerations such as matching, symmetry, shielding, parasitic management, and reliability

Experience with industry-standard CAD and physical verification tools

Self-motivated, detail-oriented and able to work effectively both independently and as part of a cross-functional team

Strong communication and problem-solving skills

Benefits

Possibility to work in an international, multicultural environment

Strong team-oriented and friendly work culture

Flexible working hours model

Internal training program

Kindergarten allowance as well as drinks and fruits for free

Edenred non-cash benefit (Edenred card)

​Employee discounts e. g. for events and branded products

  • Why Adtran
  • At Adtran, you will have the opportunity to work on meaningful technology that powers global connectivity. You’ll join a team that values technical excellence, innovation, collaboration, and continuous learning, while contributing directly to products that matter in the real world.

If you are passionate about IC layout and excited by the challenge of building advanced optical communication hardware, we’d love to hear from you.

Original posting on Adtran's site ↗

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