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NXP

Senior Lead Engineer

Noida

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hirly's read of this role

Seniority
Lead / management
Country
IN
Work mode
On-site / unstated
First seen by hirly
27 Sept 2026

Derived automatically from the posting. Upload your resume above to see how the role scores against it.

the posting

  • Master/Bachelor's Degree in Electrical/Electronic Engineering
  • Experience 6-10 Years in high performance digital logic designs and SoC Integration using ARM Cores, Bus Protocols and Interconnects
  • Building Subsystems and/or SoC RTL integration
  • LINT/CDC/RDC signoffs for the highest design quality
  • Perform all aspects of the SoC design flow from high level design to Synthesis
  • Experience with Synopsys VCS or Cadence RTL simulator, Design Complier (DC) or RTL Compiler (RC or Genus), Verdi Debugging tool
  • ISO26262 based functional safety relevant microcontroller architectures is preferred
  • Experience with low-power design techniques is desirable.
  • Conducting IP Integration reviews, BE reports reviews for concurrent engineering.
  • Self-motivated to drive issues to closure.
  • Excellent written and verbal communication skill.
  • Creative problem-solving skills, logic analysis skills, ability to logically break complex problems down to manageable components.

More information about NXP in India...

#LI-2734

Original posting on NXP's site ↗

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