Capgemini Engineering
Sr. Hardware Engineer
San Francisco, US
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hirly's read of this role
- Seniority
- Senior
- Stated salary
- $73,150 – $174,000 per year
- Country
- US
- Work mode
- On-site / unstated
- First seen by hirly
- 3 Oct 2026
Derived automatically from the posting. Upload your resume above to see how the role scores against it.
the posting
At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the world’s most innovative companies unleash their potential. From autonomous cars to life-saving robots, our digital and software technology experts think outside the box as they provide unique R&D and engineering services across all industries. Join us for a career full of opportunities. Where you can make a difference. Where no two days are the same.
Location
This is a role 100% onsite in San Jose, Ca.
About the Job You're Considering
Capgemini Engineering is seeking a Senior Hardware Engineer to support the design and development of next-generation networking platforms as a backfill for a critical engineering role. In this position, you will lead hardware architecture, design, validation, and performance optimization activities for advanced routers, network switches, and high-speed networking products, including systems supporting up to 800G interfaces and line cards.
You will work closely with software, PCB layout, mechanical, applications, manufacturing, and validation teams to solve complex technical challenges and deliver robust, high-performance products. This role is ideal for an experienced hardware engineer who thrives in high-speed digital system design and enjoys owning hardware development from architecture through product validation.
Your Role
- Lead hardware architecture, requirements analysis, schematic development, component selection, and design reviews for next-generation routers, network switches, and high-performance networking platforms.
- Design and integrate complex hardware subsystems including processors, SoCs, DDR memory, FPGAs, GPUs, network switching ASICs, PCIe switches, clocking devices, and power management solutions.
- Define PCB stack-ups and board architectures to meet signal integrity, power delivery, impedance control, mechanical, and high-speed networking requirements.
- Perform pre-layout and post-layout Signal Integrity (SI) analysis, including SERDES, DDR, clock jitter, eye diagram, crosstalk, and overshoot/undershoot simulations
- Execute Power Integrity (PI) and thermal analyses, including voltage drop, current density, plane noise, decoupling optimization, hotspot identification, and cooling solution evaluation.
- Collaborate with software, PCB layout, mechanical, and applications engineering teams to solve complex design challenges, improve product reliability, and drive successful product execution.
- Lead board bring-up, debugging, electrical validation, design verification, stress testing, and board-level functional testing while providing technical leadership throughout the product lifecycle from concept through manufacturing release.
Your Skills and Experience
- 7+ years of experience in network hardware engineering, including hardware architecture or product development for routers, network switches, telecommunications equipment, or comparable high-speed electronic systems.
- Hold a Bachelor’s degree in electrical engineering.
- Experience designing and analyzing high-speed digital interfaces, including DDR, SERDES, PCIe, clocking circuits, and advanced networking interfaces such as 800G.
- Hands-on experience with PCB stack-up development and pre-layout and post-layout signal-integrity and power-integrity analysis.
- Understand the selection and integration of processors, systems-on-chip, FPGAs, GPUs, memory, network switches, clocking devices, and power-management components.
- Experience with schematic development, thermal analysis, board bring-up, electrical validation, design verification, stress testing, and board-level functional testing.
- Demonstrate strong analytical, troubleshooting, communication, and collaboration skills, with the ability to resolve complex hardware issues and work effectively across engineering teams.
The base compensation range for this role in the posted location is:$73,150 to $174,000.
Capgemini provides compensation range information in accordance with applicable national, state, provincial, and local pay transparency laws. The base compensation range listed for this position reflects the minimum and maximum target compensation Capgemini, in good faith, believes it may pay for the role at the time of this posting. This range may be subject to change as permitted by law.
The actual compensation offered to any candidate may fall outside of the posted range and will be determined based on multiple factors legally permitted in the applicable jurisdiction.
These may include, but are not limited to: Geographic location, Education and qualifications, Certifications and licenses, Relevant experience and skills, Seniority and performance, Market and business consideration, Internal pay equity.
It is not typical for candidates to be hired at or near the top of the posted compensation range.
In addition to base salary, this role may be eligible for additional compensation such as variable incentives, bonuses, or commissions, depending on the position and applicable laws.
Capgemini offers a comprehensive, non-negotiable benefits package to all regular, full-time employees. In the U.S. and Canada, available benefits are determined by local policy and eligibility and may include:
Paid time off based on employee grade (A-F), defined by policy: Vacation: 12-25 days, depending on grade, Company paid holidays, Personal Days, Sick Leave
- Medical, dental, and vision coverage (or provincial healthcare coordination in Canada)
- Retirement savings plans (e.g., 401(k) in the U.S., RRSP in Canada)
- Life and disability insurance
- Employee assistance programs
- Other benefits as provided by local policy and eligibility
Important Notice: Compensation (including bonuses, commissions, or other forms of incentive pay) is not considered earned, vested, or payable until it becomes due under the terms of applicable plans or agreements and is subject to Capgemini’s discretion, consistent with applicable laws. The Company reserves the right to amend or withdraw compensation programs at any time, within the limits of applicable legislation.
Disclaimers
Capgemini is an Equal Opportunity Employer encouraging inclusion in the workplace. Capgemini also participates in the Partnership Accreditation in Indigenous Relations (PAIR) program which supports meaningful engagement with Indigenous communities across Canada by promoting fairness, accessibility, inclusion and respect. We value the rich cultural heritage and contributions of Indigenous Peoples and actively work to create a welcoming and respectful environment. All qualified applicants will receive consideration for employment without regard to race, national origin, gender identity/expression, age, religion, disability, sexual orientation, genetics, veteran status, marital status or any other characteristic protected by law.
This is a general description of the Duties, Responsibilities and Qualifications required for this position. Physical, mental, sensory or environmental demands may be referenced in an attempt to communicate the manner in which this position traditionally is performed. Whenever necessary to provide individuals with disabilities an equal employment opportunity, Capgemini will consider reasonable accommodations that might involve varying job requirements and/or changing the way this job is performed, provided that such accommodation does not pose an undue hardship. Capgemini is committed to providing reasonable accommodation during our recruitment process. If you need assistance or accommodation, please reach out to your recruiting contact.
Please be aware that Capgemini may capture your image (video or screenshot) during the interview process and that image may be used for verification, including during the hiring and onboarding process.
Click the following link for more information on your rights as an Applicant in the United States. h
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