Staff DSP Architect

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Join Marvell’s Data Center Engineering (DCE) Connectivity DSP Team, where we design and develop high-speed, low-power electrical and optical transceivers using PAM4 and advanced modulation schemes with FEC (Forward-Error-Correction). Our DSP solutions power AI, cloud, enterprise, and 5G infrastructure by enabling the high bandwidth interconnects essential for modern data centers. As an DSP Architect, you will have the opportunity to contribute to the system design and development of next-generation DSP architectures, while gaining hands-on experience in a leading technology group.

What You Can Expect

Architect and simulate advanced DSP systems; define key features, performance targets, and detailed specifications to guide both analog and digital design teams.

Conduct research in digital signal processing techniques for high‑speed SerDes and optical communication channels.

Prototype innovative algorithms for equalization, adaptation, and forward error correction (FEC), evaluating their feasibility and performance.

Develop and validate new DSP algorithms in C++, MATLAB, or Python within a simulation environment.

Build bit‑true models of DSP architectures and collaborate closely with design and verification teams to ensure accurate hardware implementation.

Develop/perform behavioral modeling of mixed-signal circuit designs for transceivers.

Participate in chip bring‑up activities and work hands‑on in a fast‑paced lab environment to debug and validate system behavior.

What We're Looking For

Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 3-5+ years of related professional experience OR Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 2+ years of experience.

Completed graduate coursework in at least two of the following areas:

Digital Signal Processing

Digital Communications

Information Theory

Coding Theory

Probability Theory

Preferred Qualifications:

Strong R&D experience in Probability Theory, Detection and Estimation Theory, Coding Theory, Digital Communications, or Digital Signal Processing.

Excellent analytical and problem-solving skills. Effective verbal and written communication skills.

Proficiency in C++, MATLAB, or Python.

Knowledgeable about typical optical components used in communication systems, including lasers/modulators/filters/photodetectors/TIAs.

Experience in high-speed DSP, especially FFE/DFE, adaptive filters, Clock and Data Recovery (CDR), forward error correction, Maximum likelihood sequence detection

Experience with signal integrity and ADC based wireline transceiver is a plus.

Experience with either direct-detect/intensity modulated or coherent optical communication is a plus.

Team player, willing to take on a variety of projects, good listening skills, self-motivated.

If you are passionate about high-speed DSP design and want to contribute to cutting-edge solutions, we encourage you to apply and help drive the future of AI and cloud infrastructures.

Expected Base Pay Range (USD)

119,620 - 179,200, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.


This role is eligible to participate in Marvell's bonus and equity plans, including a new hire equity grant and annual equity refreshers, ensuring you are rewarded for your contributions and remain invested in the company's long-term success.
 Additional Compensation and Benefit Elements

Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com .

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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