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Intel

Analog Circuit Design Engineer

India, Bangalore

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hirly's read of this role

Seniority
Mid level
Country
IN
Work mode
On-site / unstated
First seen by hirly
23 Oct 2026

Derived automatically from the posting. Upload your resume above to see how the role scores against it.

the posting

Job Details:

Job Description:

The Role and Impact:

As an Analog Circuit Design Engineer, you will lead the design and development of high-speed analog circuits for advanced process nodes. Your day-to-day responsibilities will include creating and optimizing circuits for analog and mixed-signal IPs, ensuring robust functionality, high performance, and power efficiency. Through your technical expertise, you will play a critical role in delivering innovative solutions that drive Intel's ability to meet global technology demands and maintain industry leadership.

Business group:

You will join the Central Engineering Group (CEG), a world-class engineering organization dedicated to developing cutting-edge technologies. The team focuses on delivering state-of-the-art solutions that enable Intel's success in innovation and product excellence, contributing to the company's broader mission of technological leadership.

Key Responsibilities:

  • - Design, develop, and optimize analog circuits for advanced process nodes, focusing on high-speed SerDes, memory interfaces, and clocking systems.
  • - Extract key chip parameters and simulate analog behavior models to validate designs against block specifications.
  • - Create and execute thorough test plans to ensure functionality, reliability, and performance of circuits.
  • - Collaborate with architecture and layout teams to optimize circuits for power, area, timing, and electrical robustness.
  • - Perform post-silicon debug and validation to analyze and resolve circuit-related issues for high-volume manufacturing readiness.
  • - Continuously refine design methodologies to improve innovation, efficiency, and delivery timelines.
  • - Utilize industry-standard EDA tools such as Cadence Virtuoso, SPICE simulators, and post-layout extraction tools for design and validation tasks.

Qualifications:

Minimum Qualifications:

  • - Bachelor's degree in Electrical Engineering or a related field with 6+ years of experience, Master's degree with 4+ years, or PhD with 2+ years in analog circuit design.
  • - Proficiency in designing high-speed analog/mixed-signal circuits, including SerDes, PLLs, regulators, and clocking systems.
  • - Expertise in CMOS design fundamentals, circuit simulation tools, and modeling techniques.
  • - Experience with EDA tools such as Cadence Virtuoso, Spectre, PrimeSim, DRC, LVS, and post-layout extraction tools.
  • - Familiarity with optimizing circuits for power, area, timing, and yield goals.

Preferred Qualifications:

  • - Experience in post-silicon validation, reliability testing, and debugging.
  • - Knowledge of scripting languages such as Python, TCL, or Perl for design automation tasks.
  • - Familiarity with modeling and simulation of high-speed interface interconnects and channels.
  • - Strong problem-solving and analytical skills, with a demonstrated ability to lead initiatives and mentor junior engineers.

We are excited to invite talented engineers to join our mission of driving innovation and transforming technology. Make an impact by contributing to Intel's cutting-edge solutions-apply now.

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location:

India, Bangalore

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Original posting on Intel's site ↗

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