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Ceremorphic Technologies

ASIC Design Verification Engineer

Hyderabad

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hirly's read of this role

Seniority
Mid level
Country
IN
Work mode
On-site / unstated
First seen by hirly
23 Sept 2026

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the posting

About the Role

Looking for candidates to work on verification of high performance and low power Microprocessor / Machine Leaning Processor / Logic Design

Key Requirements

  • Expertise in UVM based test environment development.
  • Experience in creation and signoff of assertions, constrained random generation, functional and code coverage.
  • Expertise in scripting languages like Perl, Python, Tcl to achieve automation of verification methodologies and flows.
  • Expertise in AHB/AXI based SoC Architectures.
  • Strong knowledge in ARM M-series or A-Series MCU, RISC-V architectures.
  • Experience in verifying high-speed interfaces like USB, PCIe 4x/5x, Ethernet, Mobile DDR, Quad/Octa-SPI.
  • Strong experience in peripheral interfaces like SDIO, UART, I2S, I2C, PWM, CAN, etc.
  • Knowledge in low power verification.
  • Hands-on experience in developing block-level, sub-system level and chip-level verification environments from “scratch”.
  • Senior positions require leading verification teams to drive both logic validation, emulation, pre- and post-silicon validation.
  • Management positions require proven experience of leading teams and delivering high quality products to market.
Original posting on Ceremorphic Technologies's site ↗

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