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Intel

Compiler Engineer for AI Tile-based DSL

Canada, Toronto

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hirly's read of this role

Seniority
Mid level
Stated salary
C$114,890 per year
Country
CA
Work mode
On-site / unstated
First seen by hirly
5 Nov 2026

Derived automatically from the posting. Upload your resume above to see how the role scores against it.

the posting

Job Details:

Job Description:

The Role and Impact

As a Compiler Engineer at Intel, you will design, develop, test, and optimize cutting-edge compiler technologies tailored to Intel architectures, with a focus on compiler middle-end and backend development.

You'll contribute directly to our LLVM- and TileIR-based DSL compiler stack, supporting innovative tile-based programming models and AI workloads running on Intel CPUs, GPUs, and accelerators.

This role offers an opportunity to work with emerging technologies such as TileLang and cuTile, collaborate with experienced compiler engineers, and contribute to software solutions that enable advances in artificial intelligence and high-performance computing.

Business Group

The Compiler Technology Innovation team, part of Intel's Data Center Group (DCG), focuses on creating and enhancing software tools for domain-specific programming languages.

The team is expanding its work on tile-based AI DSL compilers and programming models, a strategic area supporting AI workloads across Intel CPU and GPU architectures.

Through collaboration across engineering teams and the compiler community, we develop innovative solutions that advance heterogeneous computing, AI performance, and Intel's broader technology initiatives.

Key Responsibilities

  • Design, develop, test, and optimize compiler middle-end and backend features for Intel CPU and GPU architectures.
  • Contribute to the development and optimization of LLVM- and TileIR-based compiler technologies and domain-specific programming languages.
  • Support tile-based AI programming models and compiler development initiatives, including technologies such as TileLang and cuTile.
  • Collaborate with hardware engineering teams to support new processor features, architectures, and AI workloads.
  • Develop, maintain, and enhance compiler technologies and related tools, including Clang, DPC++, and SYCL.
  • Write comprehensive test cases to ensure code coverage, functionality, and reliability.
  • Contribute to compiler optimizations involving parallelization, vectorization, and emerging programming models.
  • Research, identify, and resolve software bugs through debugging, performance analysis, and analytical techniques.
  • Collaborate with internal engineering teams and open-source communities, including Clang and LLVM, to support compiler development and innovation.
  • Support technical discussions and collaboration with external partners and standards groups to contribute to language evolution and industry best practices.

This position is not eligible for Intel immigration sponsorship.

Join a team advancing AI compiler technologies and programming models for next-generation computing. You'll have the opportunity to develop your technical expertise while contributing to meaningful projects that support Intel's AI and data center technology strategy.

Qualifications:

Minimum Qualifications

  • Bachelor's degree in Computer Science, Applied Mathematics, Electronic Engineering, Informatics, or a closely related technical discipline.
  • 1+ year of combined relevant experience in one or more of the following areas:
  • C/C++, SYCL, CUDA, DSLs programming, object-oriented design principles, and complex data structures.
  • Compiler technologies and LLVM compiler infrastructure.
  • Hands-on knowledge of compiler middle-end or backend technologies.

Preferred Qualifications

  • Experience developing and maintaining production-grade compilers.
  • Familiarity with Clang, LLVM, or MLIR compiler frameworks.
  • Experience with vectorization and parallel programming models like TileLang, cuTile, OpenMP, SYCL, CUDA, or GPU programming.
  • Strong understanding of x86 instruction set architecture and Advanced Vector Extensions (AVX).
  • Knowledge of performance analysis, optimization, and debugging techniques.

Be part of a team that thrives on innovation and collaboration, where your contributions will empower technology breakthroughs and transform industries worldwide.

Job Type:

College Grad

Shift:

Shift 1 (Canada)

Primary Location:

Canada, Toronto

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Annual Salary Range for jobs which could be performed in Canada

CAD 114,890.00-162,190.00 Salary range dependent on a number of factors including location and experience.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

Canada Accommodation:

Intel is committed to a culture of accessibility. Intel provides accommodations to applicants and employees with disabilities. Find information and request accommodation here .

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Original posting on Intel's site ↗

Listed on hirly, a job board. hirly is not the employer: Intel is hiring for this role.

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