Cadence

Design Engineer II

BANGALORE

hirly Pro

Get in front of the people hiring at Cadence

Reach the hiring manager at Cadence on LinkedIn, from your own account
hirly applies to this job for you, with unlimited applications
A resume and cover letter written for this job, unlimited
The hiring manager and recruiter at Cadence, with contact details

Get Pro for this job →

$49 a month · ₹1,999 for 30 days in India · cancel any time

Get past the screening software and onto a recruiter's desk

hirly rewrites your resume for this job — matching the keywords and skills in the posting, moving your most relevant experience to the top, and writing a cover letter to fit. About 30 seconds.

Keywords matched to this posting
Fit score before you apply
Cover letter included

Matched against 3M live jobs from 220,000+ employers in 200+ countries.

Tailor my resume for this job →

Apply from your AI assistant

Connect hirly to Claude or ChatGPT and ask it to apply to this job. hirly tailors your resume, fills the employer’s form and asks before sending.

See how it works

Some employer sites stop an application at a CAPTCHA or sign-in and hand it back with a link. Applying needs a paid plan. Works with any assistant that supports MCP.

hirly's read of this role

Seniority: Mid level
Country: IN
Work mode: On-site / unstated
First seen by hirly: 3 Oct 2026

Derived automatically from the posting. Upload your resume above to see how the role scores against it.

the posting

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Minimum Qualifications:

2-4 years (with Btech) or 1-2 years (with Mtech) of experience in Post-Silicon Physical Layer Electrical Validation

Deep Physical Layer electrical validation experience on AT LEAST ONE High speed SERDES protocol like PCIe, USB, DP, ethernet, SRIO, JESD204, DDRIO etc

Strong hands on Experience in using lab equipment such as Oscilloscopes, Network Analyzer, Bit Error Rate Tester (BERT) etc

Preferred Qualifications:

Experience managing small teams (at least 2 members and above)

Experience leading the complete post silicon validation efforts for at least one full project

1-2 years of experience in FPGA Design, PCB schematic and layout design & Prototyping

Pre-Silicon IP/SoC Physical Layer Electrical Validation experience related to board bring-up & Debug.

Familiarity with Verilog RTL coding, FPGA coding, Labview, python, C/C++, TCL

Experience conducting hiring interviews and mentoring new hires

BE/BTech/ME/MTech or equivalent

We’re doing work that matters. Help us solve what others can’t.

Original posting on Cadence's site ↗

Listed on hirly, a job board. hirly is not the employer: Cadence is hiring for this role.

Browse similar roles

Want this one?

Upload your resume and hirly rewrites it for this job and writes the cover letter — in about thirty seconds, before you sign up.

Tailor my resume for this job