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Cadence

Design Engineer II

SHANGHAI

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hirly's read of this role

Seniority
Mid level
Country
CN
Work mode
On-site / unstated
First seen by hirly
26 Oct 2026

Derived automatically from the posting. Upload your resume above to see how the role scores against it.

the posting

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Responsibilities:

Focus on high speed digital DDR and HBM IP physical implementation

Job Requirement:

1. Have good physical design experiences in the digital implementation domain including Floorplan, P&R, Physical verification, DFM.

  • 2. Have a solid background in circuits, electronics &
  • physics & should be very willing to learn new technology for advance node
  • and design methodology
  • 3. Skilled in scripting language, such as Perl, C shell,
  • Makefile
  • 4. Feeling responsible for technical delivery, good team
  • played, design quality/schedule focus

We’re doing work that matters. Help us solve what others can’t.

Original posting on Cadence's site ↗

Listed on hirly, a job board. hirly is not the employer: Cadence is hiring for this role.

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