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AttoTude

DSP Integration Test Engineer

Menlo Park, CA

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hirly's read of this role

Role family
Engineering
Seniority
Mid level
Stated salary
$150,000 – $250,000 per year
Country
US
Work mode
On-site / unstated
First seen by hirly
31 Oct 2026

Derived automatically from the posting. Upload your resume above to see how the role scores against it.

the posting

The Opportunity

AttoTude's world-class engineering team works in a fast-paced, agile environment to develop next-generation baseband modems for intra-DCI applications. As a member of the system test team, the DSP Integration Test Engineer will own the bring-up, integration, and hardware maturity of high-speed DSP s coupled with AttoTude’s proprietary DiAx cable technology . The ideal candidate will be prepared to work with early prototypes, bringing up transmit and receive DSP functions on hardware and characterizing the combined performance of AttoTude’s 448Gbps/PAM4 AEC modules. A key component of this role is the ability to understand and make tradeoffs across DSP, analog, and RF subsystems to optimize overall system performance and carry it through to volume production . The candidate should anticipate frequent interactions with design engineers on signal processing and performance optimization . The role also includes designing, debugging, and optimizing firmware algorithms that maintain robust performance over varying link conditions.

Roles and Responsibilities

The successful candidate will play a pivotal role in bringing AttoTude's next-generation communications platform from prototypes to volume production. Responsibilities include:

Hardware bring-up and matur ation of high-speed DSP on prototype and production hardware, including transmit and receive data - path configuration, link optimization , troubleshooting and debug

Characterize and optimize Tx and Rx DSP blocks, including feed-forward and decision-feedback equalizers, MLSE, clock (timing) recovery, and assess their performance, complexity, and power tradeoffs

Measure high-speed DACs and ADCs (e.g., ENOB, SNDR, linearity, interleaving spurs, bandwidth, jitter and phase noise) and quantify their impact on modem SNR and BER

Develop calibration methods and transfer them to automated manufacturing test

Develop and test DSP-based control loops, including adaptation convergence, loop stability, tracking, and robustness over process, voltage, and temperature

Analyze link performance (pre-FEC BER, SNR) and correlate measurements with system models

Develop Python-based lab automation for test, characterization, and data analysis

Drive performance validation and qualification, and transfer DSP configurations, calibrations, and test procedures to volume production

Through frequent interaction s with DSP design, DiAx cable design, firmware /controls , and hardware teams, you will feed experimental results back into architecture , design and manufacturability decisions and help transition realized performance gains into the product.

Required Qualifications, Skills, and Experience

MSEE minimum; PhD in Electrical Engineering or Applied Physics preferred, with specialization in high-speed electronic or electro-optic communication systems

At least 5 years of relevant industry experience with an MSEE, or at least 3 years with a PhD

Experimental work experience in the bring-up and hardware maturity of high-speed DSPs, either coherent (e.g., QPSK, 16QAM, 64QAM) or multi-level PAM (e.g., PAM4)

Foundational understanding of transmit and receive side DSP blocks, with emphasis on equalizers (e.g., FFE, DFE, MLSE) and their tradeoffs, and clock and carrier recovery

Prior hands-on experimental experience measuring high-speed DACs and ADCs

Experience developing calibration methods and transferring them to manufacturing test

Experience developing and/or testing DSP-based control loops

Performance validation and productization experience, including transfer to volume production

Proficiency with high-speed lab equipment such as real-time and sampling oscilloscopes, BERTs, arbitrary waveform generators, and spectrum and phase noise analyzers

Programming experience in Python and Matlab for lab automation, modeling, and data analysis; C/C++ a plus

Excellent written and oral communication skills, including the ability to communicate complex information clearly and concisely across multiple platforms and modalities

Resourceful collaborator, supporting teammates and colleagues as needed

Preferred Qualifications

Prior work experience with coherent optical modules or 224 Gbps / PAM4 AEC modules

Familiarity with related industry standards (e.g., OIF 400ZR/800ZR, OIF CEI-224G, IEEE 802.3dj)

Understanding of forward error correction (e.g., RS/KP4, soft-decision FEC) and its interaction with DSP performance

Experience characterizing RF and mm-wave components (e.g., S-parameters, nonlinear compression) and modeling linear and nonlinear signal impairments

Familiarity with module management and telemetry interfaces (e.g., CMIS) and firmware-based monitoring

Familiarity with RTL/Verilog or hardware-oriented algorithm implementation

Fluent with statistical analysis methods and software repositories (e.g., GitHub, GitLab, Bitbucket, Docker)

Annual Salary Range

$150,000 — $250,000 USD

Original posting on AttoTude's site ↗

Listed on hirly, a job board. hirly is not the employer: AttoTude is hiring for this role.

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