Hyannis Port Research

Hardware Engineer II - Design Verification

Needham, MA

Get past the screening software and onto a recruiter's desk

hirly rewrites your resume for this job — matching the keywords and skills in the posting, moving your most relevant experience to the top, and writing a cover letter to fit. About 30 seconds.

Keywords matched to this posting
Fit score before you apply
Cover letter included

Matched against 2.6M live jobs from 210,000+ employers in 200+ countries.

Tailor my resume for this job →

Apply from your AI assistant

Connect hirly to Claude or ChatGPT and ask it to apply to this job. hirly tailors your resume, fills the employer’s form and asks before sending.

See how it works

Some employer sites stop an application at a CAPTCHA or sign-in and hand it back with a link. Applying needs a paid plan. Works with any assistant that supports MCP.

hirly's read of this role

Seniority: Mid level
Stated salary: $90,000 – $216,000 per year
Country: US
Work mode: On-site / unstated
First seen by hirly: 29 Oct 2026

Derived automatically from the posting. Upload your resume above to see how the role scores against it.

the posting

HPR is a leading provider of high-performance and ultra-low latency electronic trading and capital markets infrastructure solutions offered as a managed service. Our cutting-edge technology is used by tier-1 financial institutions to monitor and execute trades rapidly and efficiently. As we continue to innovate and grow, we’re searching for a forward-thinking Hardware Engineer II – Design Verification to help us build the future of capital markets infrastructure.

As a Hardware Engineer II – Design Verification at HPR, you will:

Verify and maintain high-performance FPGA compute and networking systems used in electronic trading

Contribute to the verification process from specification, test planning, and testbench development through execution and coverage closure

Partner with design engineers to develop, review, and execute comprehensive test plans

Create and maintain reusable verification components and testbenches written in SystemVerilog

Utilize simulation and debugging tools to identify, investigate, and resolve design issues

Contribute to improving our verification processes, tools, and methodologies

Required Qualifications

BS/MS in Computer Engineering, Electrical Engineering, Computer Science, or related field

2+ years of experience in design verification for FPGAs or ASICs

Proficiency in SystemVerilog for verification

Familiarity with verification methodologies, including constrained randomization, functional coverage, and assertion-based checking

Experience with simulation and debugging tools (e.g., VCS, Verdi)

Comfortable working in a Linux environment

Strong problem-solving, debugging, and communication skills

Desired Qualifications

Experience developing and debugging UVM-based verification environments and testbenches using SystemVerilog

Understanding of computer architecture and digital design concepts

Knowledge of networking protocols (IP, TCP, UDP)

Experience verifying designs with high-speed interfaces (PCIe, Ethernet, and/or DDR)

Familiarity with C programming and scripting in Python and/or Perl

Compensation

In compliance with Massachusetts law, the anticipated annual base salary range for this position is $90,000 to $216,000. Please note that this range represents the expected base salary for this role at the time of posting. The final offer may vary based on factors such as the candidate's experience, skills, and qualifications. This range does not include other forms of compensation such as potential bonuses, equity, or benefits.

This position requires being on-site at our office in Needham, MA full-time (5 days per week).

HPR does not currently provide employment sponsorship

Original posting on Hyannis Port Research's site ↗

Listed on hirly, a job board. hirly is not the employer: Hyannis Port Research is hiring for this role.