hirly

IBM

Lead Analog Circuit Design Engineer

Bangalore, India

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hirly's read of this role

Seniority
Lead / management
Country
IN
Work mode
On-site / unstated
First seen by hirly
30 Oct 2026

Derived automatically from the posting. Upload your resume above to see how the role scores against it.

the posting

At IBM Infrastructure & Technology, we design and operate the systems that keep the world running. From high-resiliency mainframes and hybrid cloud platforms to networking, automation, and site reliability. Our teams ensure the performance, security, and scalability that clients and industries depend on every day. Working in Infrastructure & Technology means tackling complex challenges with curiosity and collaboration. You'll work with diverse technologies and colleagues worldwide to deliver resilient, future-ready solutions that power innovation. With continuous learning, career growth, and a supportive culture, IBM provides the opportunities to build expertise and shape the infrastructure that drives progress. The Analog circuit design engineer will play key role in developing IBM's next generation Ultra high speed serial IO link (HSS) interface for Cognitive, ML,DL, and data center applications using IBM main frame servers. The engineer will be involved in the design and development full custom analog circuits for ultra high speed 32G/64G HS IO link interface. 1. Design and development of key full custom analog blocks/sub blocks for Tx /Rx/PLL/CLK Distribution modules for 32G/50G/112G HS Serdes IO links and general purpose IO transceiver macros for PCIe, optical IO interfaces using industry's latest 2nm/5nm GAA technology. 2. Complete ownership/execution lead of analog macro development starting from - understanding data sheet specifications, - driving/creating design specifications for macros, - defining architecture, - design analog sub blocks/modules, - creating simulation plan and execute, - developing floor plan for macro, - working closely with layout engineers for layout, - good understanding of EM/IR/Self heating issues and mitigation - understanding layout extraction methodology and perform post layout simulation and - deliver the macro to global stake holders with good quality. 3. Thorough electrical device level understanding of 2nm/5nm GAA FinFET process 4. Good understanding of analog circuit design and simulation methodology, CAD tool flow for 2nm/5nm GAA process 5. Participate in concept, schematic and final design reviews for circuit blocks with global stake holders. 6. Plan design work with constraints on performance, power, time and quality. 7. Proper documentation of design work. 8. Work closely with test characterization team during chip characterization/yield analysis. The Analog circuit design engineer with experience in next generation Ultra high speed serial IO link (HSS) interface for Cognitive, ML,DL, and data center applications. The engineer needs to have good knowledge in the design and development full custom analog circuits for ultra high speed 32G/50G/112G IO link interfaces. Working experience in 2nm, 5nm,7nm analog HS Serdes circuit design. Working on Cutting edge technology and HSS domain . Quick learner, deep circuit design knowledge, problem solving skills and good communication skills. Good high speed Analog Serdes layout understanding. India Infrastructure & Technology Hybrid Professional Bangalore, IN Bangalore (0063) IBM India Private Limited Analog Circuit Design Electronic Circuit Design Communication Data Center Design Edge Engineering Interfaces Machine Learning Problem Solving Serialization/Deserialization Technology

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