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Cadence

Lead Design Engineer

BANGALORE

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hirly's read of this role

Seniority
Lead / management
Country
IN
Work mode
On-site / unstated
First seen by hirly
3 Oct 2026

Derived automatically from the posting. Upload your resume above to see how the role scores against it.

the posting

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

  • BE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer.
  • 4+ years of Design Verification experience with SV/UVM
  • Strong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must.
  • Design Verification experience verifying complex designs and leading projects from concept to verification closure.
  • Strong hands-on UVM and System Verilog coding experience and functional verification environment development is required.

Prior experience in IP verification of memory IP (DDR/HBM/GDDR) would be an added advantage

We’re doing work that matters. Help us solve what others can’t.

Original posting on Cadence's site ↗

Listed on hirly, a job board. hirly is not the employer: Cadence is hiring for this role.

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