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Silicon Labs

Lead Engineer – IC Verification

Hyderabad

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hirly's read of this role

Seniority
Lead / management
Country
IN
Work mode
On-site / unstated
First seen by hirly
23 Oct 2026

Derived automatically from the posting. Upload your resume above to see how the role scores against it.

the posting

Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world’s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more at www.silabs.com .

The Role

In this role, you will work on verifying complex digital RTL blocks within wireless modem baseband and PHY-layer subsystems that power Wi-Fi and low-power IoT devices. You will play a key role in ensuring the functional correctness, performance, and reliability of modem IPs used in Silicon Labs' wireless SoCs.

This is a great opportunity for an experienced Design Verification Engineer who enjoys solving complex technical challenges, developing robust verification environments, and working closely with design and systems teams to deliver high-quality wireless solutions.

Meet the Team

Our Modem team develops digital baseband and PHY-layer IPs that enable wireless connectivity across Wi-Fi and low-power IoT applications.

As part of this team, you will collaborate closely with RTL designers, modem system engineers, verification engineers, and SoC teams to verify complex modem IPs and ensure seamless integration into wireless SoCs.

Responsibilities

As a Lead IC Verification Engineer on the Modem team, you will:

  • Develop and maintain SystemVerilog/UVM-based verification environments for modem digital baseband and PHY-layer IPs.
  • Design and implement module-level and subsystem-level testbenches, including drivers, monitors, agents, scoreboards, and coverage models.
  • Define and execute comprehensive verification plans to ensure functional correctness and design quality.
  • Drive constrained-random verification, functional coverage, and coverage closure.
  • Perform bit-exact verification by integrating C-based algorithmic reference models into verification environments.
  • Verify complex mixed-signal datapath and PHY-layer modules used in wireless communication systems.
  • Debug complex RTL and testbench issues, working closely with design and system engineering teams to identify root causes.
  • Collaborate across functional teams to resolve integration challenges and ensure successful IP verification and delivery.
  • Participate in design reviews, verification planning, and continuous improvement of verification methodologies.

Skills You Will Need

  • Bachelor's or Master's degree in Electrical Engineering, Electronics, Communication Engineering, or a related field.
  • 7–15 years of experience in RTL Design Verification, preferably involving mixed-signal datapath, modem baseband, or PHY-layer modules.
  • Strong hands-on expertise in SystemVerilog and UVM verification methodologies.
  • Experience developing UVM testbench components such as agents, drivers, monitors, scoreboards, and coverage models.
  • Strong understanding of constrained-random testing, functional coverage, and coverage closure.
  • Experience integrating C-based reference models for bit-exact functional verification.
  • Good understanding of digital communication systems and PHY-layer concepts.
  • Strong debugging, problem-solving, and cross-functional collaboration skills.

Skills That Will Make You Stand Out

  • Experience with IEEE 802.11 Wi-Fi, 4G/5G cellular, or other OFDM-based communication systems.
  • Hands-on experience verifying wireless modem baseband and digital signal processing IPs.
  • Knowledge of DSP blocks such as FFT, FIR filters, correlators, and FEC decoders.
  • Experience working with mixed-signal verification environments and digital/analog interfaces.
  • Experience with subsystem-level verification and integration of complex IPs into wireless SoCs.
  • Ability to independently own verification activities and drive complex debugging and coverage closure.

"Experience with artificial intelligence (AI) powered tools and technologies used to enhance productivity, analysis, and decision-making"

Benefits & Perks

At Silicon Labs, you’ll be part of a highly skilled team where every engineer makes a meaningful impact. We promote work-life balance and a welcoming, fun environment.

  • Equity Rewards (RSUs)
  • Insurance plans with outpatient cover
  • National Pension Scheme (NPS)
  • Flexible work policy
  • Childcare support

Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.

Original posting on Silicon Labs's site ↗

Listed on hirly, a job board. hirly is not the employer: Silicon Labs is hiring for this role.

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