Cadence

Lead Software Engineer

ZHUBEI 01

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hirly's read of this role

Role family: Engineering
Seniority: Lead / management
Country: TW
Work mode: On-site / unstated
First seen by hirly: 16 Oct 2026

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the posting

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Develop PG solution in C++ for APD and Allegro, which includes but not limited to plane router, via placement and SI/PI aware routing.
Improve overall performance of PG solution.
Integrate PG solution with other APD functionalities like System design planar, signal router and SI/PI analysis tool.

We’re doing work that matters. Help us solve what others can’t.

Original posting on Cadence's site ↗

Listed on hirly, a job board. hirly is not the employer: Cadence is hiring for this role.

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