Zoiss Engineering GmbH
PDL/FPGA-Hardware-Tester (d/w/m)
Lindenberg im Allgäu, Bayern, Germany
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hirly's read of this role
- Role family
- Skilled trades
- Seniority
- Mid level
- Stated salary
- €71,000 – €94,000 per year
- Country
- DE
- Work mode
- On-site / unstated
- First seen by hirly
- 26 Sept 2026
Derived automatically from the posting. Upload your resume above to see how the role scores against it.
the posting
As an experienced regional engineering company, Zoiss Engineering GmbH has access to a large network of renowned customers. Join Zoiss and work on interesting projects in a wide range of industries. We are always looking for experienced engineers, technical draughtsmen, computer scientists and technical editors in all fields. Simply apply and benefit from a wide variety of jobs.
Your tasks
- Functional verification of an Aerospace product (PLD/FPGA) by test and analysis
- Definition of requirements of PLD/FPGA test and its test equipment
- Verification and evaluation of verification data and test results
- Creation of test and verification documentation
- Development of test applications
- Creation and performance of verification tool qualifications, as well as their further development
- Analysis methods development and their performance for customer products
Your Profil
- Successfully completed studies in the field of computer science, electrical engineering, electronics or similar qualification
- Experience in development and/or verification of PLD/FPGA
- Knowledge of modern verification methods
- Knowledge of VHDL and TCL
- Analytical and structured way of working
- English (must) and German (min. Level B1) skills
- Team player
- ISTQB qualification (nice to have)
- DO-254 Knowledge (nice to have)
What we offer
- Thorough training
- Gym subsidy
- Above-average pay
- Attractive expense allowance
- 30 days of paid holiday
- Holiday and Christmas bonuses
- BAV and VWL
Listed on hirly, a job board. hirly is not the employer: Zoiss Engineering GmbH is hiring for this role.
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