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Ambarella

Physical Design Engineer Intern

US Headquarters

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hirly's read of this role

Seniority
Internship
Country
US
Work mode
On-site / unstated
First seen by hirly
23 Oct 2026

Derived automatically from the posting. Upload your resume above to see how the role scores against it.

the posting

AI Vision Processors For Edge Applications

Our solutions make cameras smarter by extracting valuable data from high-resolution video streams.

Job Description

The Physical Design Engineer will be an integral part of the physical design team with all aspects of physical design implementation and verification tasks for Ambarella’s cutting edge low power AI SoC from Netlist to GDSII.

The Physical Design Engineer will be responsible for the following areas throughout all phase of SoC implementation process; floor-planning, auto place and route, static timing analysis, eco implementation, signal integrity analysis, EM/IR analysis, formal verification, and physical layout verification (LVS/DRC/DFM) at block and/or full chip level.

Original posting on Ambarella's site ↗

Listed on hirly, a job board. hirly is not the employer: Ambarella is hiring for this role.

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