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Tenstorrent

Power Architect

Austin, Texas, United States · Boston, Massachusetts, United States · Santa Clara, California, United States · Toronto, Ontario, Canada

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hirly's read of this role

Seniority
Mid level
Countries
US, CA
Work mode
On-site / unstated
First seen by hirly
6 Sept 2026

Derived automatically from the posting. Upload your resume above to see how the role scores against it.

the posting

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

Our Tensix Team is building the next generation of high-performance AI compute systems. We’re looking for a Power Architect to drive architectural strategy, modeling, and design decisions that shape how power is understood and optimized across our products. This is a hands-on role with massive influence over how we build power-aware systems from the ground up.

This role is hybrid, based out of Santa Clara, CA, Boston, MA, Austin, TX or Toronto.

We welcome candidates at various experience levels. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

15+ years experience with power estimation tools like PowerArtist, PtPX, RTL Architect, and PrimePower.

Skilled in modeling and optimizing power at the architectural level, with deep knowledge of power-gating, voltage domains, and leakage control.

Track record of influencing architectural and micro-architectural changes that meaningfully reduced design power.

Proficient in Verilog HDL, Design Compiler, C/C++ and Python.

Background in power-optimization of compute datapath and/or interconnects.

What We Need

Predict power consumption early in architecture and track it through RTL evolution.

Propose architectural changes for power optimization across server and non-server markets.

Build workloads that stress real-world use cases and guide thermal and power-delivery solutions.

Correlate pre-silicon estimates to silicon measurements and drive power efficiency improvements.

What You Will Learn

How AI workloads impact power at every layer of the stack — from circuit to software.

Challenges in building accurate, CI-integrated power modeling infrastructure.

Techniques for aligning design tradeoffs to the realities of AI model execution.

How Tenstorrent approaches full-stack power optimization across chiplet-based systems.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.

Original posting on Tenstorrent's site ↗

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