hirly

Graphcore

Principal Embedded SW/FW Engineer (Bringup) - Multiple Vacancies

Bengaluru, India

hirly Pro

Get in front of the people hiring at Graphcore

  • Reach the hiring manager at Graphcore on LinkedIn, from your own account
  • hirly applies to this job for you, with unlimited applications
  • A resume and cover letter written for this job, unlimited
  • The hiring manager and recruiter at Graphcore, with contact details
Get Pro for this job →

$49 a month · ₹1,999 for 30 days in India · cancel any time

See how you match this job — and similar ones. Free.

Upload your resume and hirly scores it against this role at Graphcore first, then against similar open jobs, and shows where you fit and why.

PDF or DOCX, up to 12MB. No sign-up to see your matches.

Get past the screening software and onto a recruiter's desk

hirly rewrites your resume for this job — matching the keywords and skills in the posting, moving your most relevant experience to the top, and writing a cover letter to fit. About 30 seconds.

  • Keywords matched to this posting
  • Fit score before you apply
  • Cover letter included

Matched against 2.7M live jobs from 210,000+ employers in 200+ countries.

Tailor my resume for this job →

Apply from your AI assistant

Connect hirly to Claude or ChatGPT and ask it to apply to this job. hirly tailors your resume, fills the employer’s form and asks before sending.

Some employer sites stop an application at a CAPTCHA or sign-in and hand it back with a link. Applying needs a paid plan. Works with any assistant that supports MCP.

hirly's read of this role

Seniority
Lead / management
Country
IN
Work mode
On-site / unstated
First seen by hirly
11 Sept 2026

Derived automatically from the posting. Upload your resume above to see how the role scores against it.

the posting

Principal Embedded SW/FW Engineer (Bringup) - Bengaluru, multiple vacancies

Job Summary

We have an exciting opportunity to be part of a collaborative, cross-functional development team validating cutting-edge, high-performance AI chips and platforms.

You will play a key role in supporting new product introductions and post-silicon validation.

Working within the Post-Silicon Validation team, you will be involved with bringing first silicon to life, functionally validating it and working closely with many other teams to help it become a fully characterised and working product, reporting project status/progress to program management on a regular basis. You will have the opportunity to provide technical guidance to other engineering team members. In this role, you can leverage our experience and industry knowledge to architect and drive implementation of continuous improvements to test infrastructure and processes.

The Team

The Post-Silicon Bringup team sits within the Architecture and Validation team, we are responsible for bringup and validation of new silicon when it returns from manufacture, enabling and supporting the production SW and FW teams to bring up their software and supporting the Silicon Characterisation team.

Responsibilities and Duties

Plan, design, develop and debug silicon validation tests in bare metal C/C++ on FPGA/Emulator prior to first silicon

Deploy silicon validation tests on first silicon and debugging them

Develop automated test framework and regression test suites in Python to optimize validation efficiency

Collaborate closely with engineers from many other disciplines on a variety of topics

Work with Validation and Production Test engineering peers to implement best practices and continuous improvements to test methodologies

Analyse test results, identify and debug failures/defects

Contribute to shared test and validation infrastructure

Provide feedback to architects

Candidate Profile

Essential:

Understanding of ML applications and their workloads

A self-starter who can apply independent judgement

A team player able to lead and support colleagues with difficult concepts

Strong experience in Bare metal / embedded C/C++

Excellent problem-solving, analytical & diagnostic skills

Ability to work across teams and programming languages to find root causes of critical and complex issues

Experience of the post-silicon validation process applied in digital ASIC environments

Python, Linux

Excellent communication skills and the ability to explain difficult concepts to resolve issues

Desirable

10+ years experience

Experience building and leading, multi-site teams

Driver level experience with one or more of the following is highly desirable:

PCIe

Ethernet

Memory technologies (LPDDR, DDR, HBM, …)

Other peripherals such as I2C, I3C, SPI, …

Good knowledge of mixed-signal building blocks such as PLLs, high speed PHYs and IC control/communication protocols is highly desirable.

Experience of Arm CPUs, System IP and debug tools.

Experience of AMBA protocols.

Experience in Characterization, Failure Analysis, Test Development, Statistical analysis,

Original posting on Graphcore's site ↗

Listed on hirly, a job board. hirly is not the employer: Graphcore is hiring for this role.

Browse similar roles

Want this one?

Upload your resume and hirly rewrites it for this job and writes the cover letter — in about thirty seconds, before you sign up.

Tailor my resume for this job