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Renishaw

Principal FPGA Design Engineer

Wotton-under-Edge, UK

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hirly's read of this role

Seniority
Lead / management
Stated salary
£70,000 per year
Country
GB
Work mode
On-site / unstated
First seen by hirly
10 Sept 2026

Derived automatically from the posting. Upload your resume above to see how the role scores against it.

the posting

Job Description

Principal FPGA Design Engineer

up to £70,000 depending on experience

We have opportunities for ambitious FPGA Engineers at Principal level to join our multidisciplinary engineering team at the forefront of additive manufacturing technology.

Our FPGA platforms are central to the control, sensing, communication and real-time processing capabilities of our next-generation products. Working within Research & Development, you will contribute to the full product lifecycle, from concept and architecture through verification, release to production, and long-term support.

These are hands-on engineering roles, combining FPGA design, verification and hardware bring-up with close collaboration across electronics, software, systems, algorithms and mechanical engineering teams. Depending on experience and grade, you will also provide technical leadership, influence engineering strategy, and mentor developing engineers.

The FPGA frequently interfaces with high-speed digital electronics, embedded processors, sensors and analogue circuitry. As such, a strong appreciation of system-level design and hardware/software interaction is essential.

Key Responsibilities

FPGA Design & Development

Develop FPGA architectures and RTL designs from concept through to production release.

Design, implement and maintain high-quality VHDL solutions with a focus on performance, reliability, portability and efficient resource utilisation.

Perform timing analysis, constraint development, timing closure and design optimisation.

Implement and verify FPGA functionality in both simulation and on target hardware.

Develop reusable and maintainable IP blocks and design frameworks for use across multiple projects and product generations.

Support product sustainment, issue investigation and design improvements throughout the product lifecycle.

Verification & Validation

Develop robust verification environments using modern methodologies including OSVVM and VUnit.

Create reusable, self-checking testbenches with measurable verification coverage.

Define verification strategies, plans and acceptance criteria.

Drive continuous improvement in simulation, regression testing and automated verification workflows.

Support hardware validation, debugging and system integration activities.

Systems & Product Development

Capture, analyse and refine requirements, ensuring clear traceability from customer and system requirements through to implementation and verification.

Work closely with systems, electronics, software, algorithms and test engineers to deliver integrated solutions.

Evaluate and implement signal processing, control and embedded algorithms within FPGA architectures.

Contribute to safety, reliability and compliance activities, including design assurance and audit-ready engineering evidence.

Produce and maintain high-quality technical documentation, including architecture specifications, interface definitions, verification reports and design rationale.

Strategic & Architectural Leadership

Define FPGA architecture roadmaps and technical direction across multiple products and programmes.

Assess and introduce new technologies, design methodologies and verification approaches.

Act as a recognised subject matter expert for FPGA and digital systems engineering.

Influence system-level architecture decisions and long-term technology strategy.

Essential Requirements

Degree in Electronic Engineering, Physics, Computer Engineering or a related discipline.

Strong commercial experience developing FPGA solutions using VHDL.

Solid understanding of digital design principles, including: Timing analysis and timing closureClock domain crossing techniquesReset architecturesPipelining and resource optimisationHigh-speed digital interfaces

Experience implementing and verifying FPGA designs in simulation and on hardware.

Understanding of FPGA development tools and design flows.

Ability to communicate effectively within a multidisciplinary engineering team.

Extensive experience leading the architecture and development of complex FPGA-centric products.

Recognised expertise in FPGA design, verification and system integration.

Track record of influencing engineering strategy and technology direction.

Strong capability in technical leadership across multiple programmes and engineering disciplines.

Experience defining engineering processes, standards and verification methodologies.

Desirable Requirements

Experience with Intel (Altera) FPGA devices and Quartus development tools.

Experience of OSVVM, VUnit and modern verification methodologies.

Familiarity with VS Code, Active-HDL or equivalent simulation environments.

Knowledge of embedded software development using C, C++ or Python.

Experience with Git, Azure DevOps and continuous integration/continuous deployment (CI/CD) workflows.

Understanding of DSP, control systems and numerical algorithms.

Knowledge of high-speed digital design, EMC and mixed-signal electronics.

Experience working within regulated or safety-conscious product development environments.

Person Specification

You are a passionate and capable engineer who enjoys solving complex technical challenges and delivering robust, high-quality products.

You combine strong FPGA design expertise with a systems-level mindset and are comfortable working across disciplinary boundaries. You communicate clearly, collaborate effectively and take ownership of technical outcomes.

At Principal level, you are a recognised technical authority who influences product architecture, engineering strategy and organisational capability while continuing to engage with hands-on engineering challenges.

Benefits

When you join Renishaw, we're committing to your future career. That's because we believe in developing our people's skills and promoting them internally. We also offer a benefits package that's highly desirable; including a 9% non-contributory pension, discretionary annual bonus, *subsidised onsite restaurants and *coffee shops, free parking, *car sharing scheme and *24 hour fitness centres. ( not available at all sites).

We also want to promote a healthy work-life balance as much as possible, so we have introduced a hybrid working policy which allows for a combination of home and office based working depending on the nature of your role. We also offer a variable working programme, 25 days holiday plus bank holidays, Life Assurance policy of 12 times annual salary, Cycle to Work scheme, enhanced maternity pay subject to qualifying criteria, Health Cash Plan, the option to join Renishaw Health Trust (Aviva) and an Employee Assistance Programme for employees and family.

Please click here for further information about our benefits.

At Renishaw we believe that our success is powered by welcoming a workforce of diverse and talented people. Through encouraging an inclusive culture, where all our employees are free to be themselves, we can achieve our core values: Innovation, Inspiration, Integrity, and Involvement.

If you are excited about the role but feel as though you don’t meet all the requirements, we would encourage you still to apply. You might just be the right person for this role or another opportunity at Renishaw.

We are committed to providing reasonable adjustments to make interviews and jobs more accessible. Should you have any difficulty during the recruitment process, or require any reasonable adjustments please contact the recruitment team on 01453 490384 or recruitment@renishaw.com.

Please click here for further information about diversity and inclusion at Renishaw.

Employment Type:

Permanent

Time Type:

Full time

Requisition Number:

R9922 Principal FPGA Design Engineer (Open)

Original posting on Renishaw's site ↗

Listed on hirly, a job board. hirly is not the employer: Renishaw is hiring for this role.

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