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Cadence

Prinicipal Customer Engagement Engineer - PDK

SHANGHAI

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hirly's read of this role

Seniority
Mid level
Country
CN
Work mode
On-site / unstated
First seen by hirly
3 Oct 2026

Derived automatically from the posting. Upload your resume above to see how the role scores against it.

the posting

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

  • Bachelor’s degree is required, with 6+ years of experience in IC design, electronic engineering, or computer science–related applications.
  • Familiar with analog design flows, including circuit and layout design, physical verification (DRC/LVS/Dummy Fill), and post‑layout RC extraction flows.
  • Solid understanding of Spice models and simulation flows is a strong plus.
  • Basic understanding of semiconductor manufacturing processes (e.g., CMOS process fundamentals, PDK concepts, variability considerations).
  • Experience supporting foundry is highly preferred.
  • Proficient in programing languages, including PERL/TCL/SKILL., experience w/ Cadence PAS/Pcell Designer tool is a plus.
  • Strong communication skills, self‑motivated, with a collaborative mindset and customer‑oriented attitude.
  • MS degree and/or prior experience at an IC design house or foundry is a plus.

We’re doing work that matters. Help us solve what others can’t.

Original posting on Cadence's site ↗

Listed on hirly, a job board. hirly is not the employer: Cadence is hiring for this role.

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