Quantum Interposer Technologist

At IBM Research, we are the innovation engine of IBM. Exploring what’s next in computing and shaping the technologies the world will rely on tomorrow. From advancing AI and hybrid cloud to pioneering practical quantum computing, we anticipate challenges and unlock new opportunities for clients, partners, and society. Working in Research means joining a team that accelerates discovery at the intersection of high-performance computing, AI, quantum, and cloud. You’ll collaborate with leading scientists, engineers, and visionaries to push boundaries and turn ideas into reality. With a culture built on curiosity, creativity, and collaboration, IBM Research offers the opportunity to grow your career while contributing to breakthroughs that transform industries and change the world. The Quantum Interposer Technologist will serve as the technical leader and operational driver for IBM’s silicon spin interposer technologies, shaping process architecture, directing fabrication strategy, and ensuring the successful delivery of advanced interposer technologies. This role requires deep understanding and experience with Silicon spin interposers, including hands‑on mastery of wafer fabrication, finishing, and advanced packaging, paired with high‑level leadership across facilities planning, workforce development, capital strategy, and long‑range technology road mapping. The ideal candidate brings extensive expertise in superconductors, RF integration, and cryogenic applications, combined with the capability to guide complex technical organizations and independently deliver robust, scalable solutions. Essential Duties · Act as the primary subject matter expert for superconducting silicon spin interposer technical roadmap, influencing program direction, capability expansion, and strategic cross‑functional decision making. · Set the technical vision and lead the development, fabrication, and continual refinement of silicon spin superconducting interposer manufacturing flows, spanning wafer‑level processing, finishing steps, multilayer integration, and advanced packaging approaches. · Architect and evolve end‑to‑end process stacks and interposer layouts to achieve high‑performance connectivity, interface stability, and cryogenic reliability. · Direct hands‑on manufacturing and characterization efforts; drive structured experimentation, rigorous failure analysis, and comprehensive root‑cause investigations to validate materials behavior, process interactions, and system‑level performance. · Establish and own the governing framework for silicon spin interposer fabrication, including design rules, operational controls, reliability criteria, documentation standards, and continuous improvement practices. · Partner closely with internal design organizations to align mask strategies, connectivity requirements, RF considerations, and cryogenic constraints throughout review and tape‑out cycles. · Provide high‑level technical leadership and oversight to external manufacturing partners, ensuring precise alignment on superconducting materials, wafer‑level processes, packaging specifications, and deep‑cryogenic performance expectations. · Integrate cryogenic mechanical, thermal, and RF requirements into every stage of interposer architecture, manufacturing flow, and qualification methodology. · Lead long‑range planning for the interposer manufacturing domain, including facility design requirements, organizational build‑out, capital equipment strategy, and development timelines consistent with program milestones. Expert level understanding of Silicon spin superconducting device fabrication, integration, and cryogenic system development. Demonstrated success with facilities planning, capital equipment selection, fabrication line establishment, staffing strategies, and long‑term technology development road mapping. Extensive background in wafer fabrication, thin‑film processes, multilayer wiring, superconducting materials, or semiconductor‑class interposer research, development and manufacturing. Expertise in RF design constraints, interposer parasitics, and deep‑cryogenic performance requirements. Mastery of superconducting device behavior, materials interactions, interface engineering, and advanced packaging technologies. BS, MS, or PhD in Electrical Engineering, Materials Science, Physics, Chemical Engineering, or related field. Proven ability to resolve complex technical challenges through structured experimentation, quantitative analysis, and systematic root‑cause methodologies. Clear, effective communication skills with a demonstrated ability to lead cross‑functional engineering teams and present technical strategies to senior leadership. Experience applying Statistical Process Control (SPC) to ensure manufacturing stability, reliability, and continuous improvement. Proficiency with tools for data analysis, modeling, and Design of Experiments (DOE). United States Infrastructure & Technology Professional Yorktown Heights, US Yorktown Heights (0147) International Business Machines Corporation Continuous Improvement Data Analysis Design of Experiments Engineering Integration Leadership Manufacturing Materials Modeling Planning RF Design Reliability Research Road Silicon Statistical Process Control Quantitative Data Analysis Effective communication Technology Equipment Selection Fabrication Wafer Fabrication