hirly

NVIDIA

Senior Applied Research Engineer, Accelerator Algorithms

India, Bengaluru

See how you match this job — and similar ones. Free.

Upload your resume and hirly scores it against this role at NVIDIA first, then against similar open jobs, and shows where you fit and why.

PDF or DOCX, up to 12MB. No sign-up to see your matches.

Get past the screening software and onto a recruiter's desk

hirly rewrites your resume for this job — matching the keywords and skills in the posting, moving your most relevant experience to the top, and writing a cover letter to fit. About 30 seconds.

  • Keywords matched to this posting
  • Fit score before you apply
  • Cover letter included

Matched against 2.7M live jobs from 200,000+ employers in 200+ countries.

Tailor my resume for this job →

Apply from your AI assistant

Connect hirly to Claude and ask it to apply to this job. hirly tailors your resume, fills the employer’s form and asks before sending. ChatGPT: manual setup today.

Some employer sites stop an application at a CAPTCHA or sign-in and hand it back with a link. Applying needs a paid plan. Works with any assistant that supports MCP.

hirly's read of this role

Seniority
Senior
Country
IN
Work mode
On-site / unstated
First seen by hirly
3 Oct 2026

Derived automatically from the posting. Upload your resume above to see how the role scores against it.

the posting

As the world’s leading accelerated computing company, we are paving the way with innovations in self-driving cars, robotics, machine learning, supercomputing, and visualization. We are building a team that will truly change the world and would love for you to join us. We are seeking a Senior Applied Research Engineer, Accelerator Algorithms to drive applied research and architecture for algorithms on NVIDIA’s Programmable Vision Accelerator (PVA), a power-efficient, deterministic VLIW/SIMD processor used across NVIDIA DRIVE, Jetson, and IGX platforms. In this role, you will analyze real-world AV and physical AI workloads across multimodal sensor processing, perception pipelines, sensor fusion, and real-time control loops, identify workloads well suited for the PVA and translate them into optimized algorithms.

The successful candidate will be equally comfortable analyzing emerging workloads, prototyping accelerator-friendly algorithms, reasoning about memory and execution models, and collaborating across research, compiler, SDK, systems software, and hardware architecture teams. This role will directly influence future PVA hardware architecture, programming model, compiler, SDK, and systems software features.

What You Will Be Doing:

Research and characterize real-world AV and physical AI workloads to identify algorithms that map well to PVA.

Develop and optimize PVA algorithms using instruction-level parallelism, memory-aware scheduling, efficient data movement and vectorized execution.

Translate workload and algorithm insights into requirements for PVA hardware architecture, compilers, SDKs, profiling tools, and systems software.

Build prototypes, benchmarks, and performance models to evaluate PVA algorithm performance across current and future hardware architectures.

Leverage modern AI-assisted development tools and agentic workflows to accelerate workload analysis, algorithm creation, benchmarking, and performance exploration.

Partner with internal teams and customers to understand their systems and production workloads, and drive integration of PVA-accelerated algorithms into final products to deliver real-world performance, power, and latency benefits.

Publish, present, and communicate technical findings across research and engineering teams where appropriate.

What We Need To See:

BS/MS or PhD in Computer Science, Electrical Engineering, Computer Engineering, Robotics, or a related field, or equivalent experience.

12+ years of experience in applied research, programmable accelerator algorithm design, computer architecture, or high-performance computing.

Experience with DSP, SIMD, VLIW, fixed-point arithmetic, memory hierarchy, and low-level performance optimization.

Experience with HW/SW co-design, workload characterization, performance modeling, benchmarking, and bottleneck analysis.

Familiarity with emerging physical AI workloads such as VLA models, multimodal perception, sensor processing, autonomous systems, or robotics systems.

Strong programming skills in C++, Python, CUDA, or similar environments.

Excellent communication skills and the ability to explain complex technical tradeoffs clearly.

Strong ownership, technical judgment, and ability to operate in ambiguous problem spaces.

Ways To Stand Out From The Crowd:

Hands-on experience with CUDA, ROS/ROS2, AV or robotics middleware, sensor processing frameworks, profiling tools, and heterogeneous compute pipelines.

Strong research track record in computer architecture, autonomous systems or sensor processing.

Familiarity with safety-conscious development processes such as ISO 26262, IEC 61508, or similar standards.

NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative, autonomous, and love a challenge, we want to hear from you. NVIDIA is leading the way in accelerated computing, robotics, high-performance computing, and physical AI. We are looking for extraordinary people to help us shape the programmable accelerators that will power the next generation of autonomous machines.

Original posting on NVIDIA's site ↗

Listed on hirly, a job board. hirly is not the employer: NVIDIA is hiring for this role.

Browse similar roles

Want this one?

Upload your resume and hirly rewrites it for this job and writes the cover letter — in about thirty seconds, before you sign up.

Tailor my resume for this job