Samsung Research America
Senior Staff Engineer, SoC NPU Architect
665 Clyde Avenue, Mountain View, CA, USA
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hirly's read of this role
- Role family
- Engineering
- Seniority
- Lead / management
- Stated salary
- $203,700 – $305,500 per year
- Country
- US
- Work mode
- Remote-friendly
- First seen by hirly
- 9 Sept 2026
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the posting
Lab Summary:
The Samsung SoC Architecture Lab explores innovative SoC architecture, key IP blocks (CPU, GPU, NPU), bus / memory subsystem and multimedia subsystems for future Samsung Galaxy products (Smartphones, IoT and future devices) echoing Samsung’s AI for All strategy. We are defining the high-performance SoC architecture development for various Galaxy device lineups. This lab collaborates with Samsung MX headquarter team, key R&D teams around the globe and Samsung's strategic SoC partners to innovate and reinvent technology that will positively impact hundred-millions of people around the world via the Galaxy flagship products.
Position Summary:
We are looking for a NPU Architect for next generation SOCs. This is a highly visible hands-on role leading individual and team contributions to NPU sub-system architecture, interface, performance and power tradeoffs. Responsible for anywhere from early-stage architectural exploration, research work focusing on machine learning, defining new features, performance modeling, Hardware-Software co optimization.
Position Responsibilities:
Propose innovative NPU Architectural and micro-architectural features to boost PPA (Performance, Power and Area) on various targeted workloads in next generation SOCs
Perform high-level performance modeling/simulation and analysis of NPU features, applications, benchmarks, and complex uses case
Develop cycle accurate and analytical NPU performance model and correlate with Silicon
Deliver architecture/microarchitecture proposals and specifications to the design team and articulate them effectively across audiences ranging from hardware & software engineers to architecture community peers, and to technology leadership
Analyzing benchmarks, application workloads, and performance simulation results for architecture and microarchitecture optimizations
Map AI use cases to NPU.
Optimize and co-design of SW and HW to develop new architectures for low power and high performance
Collaborate across teams to bring architecture proposals to fruition across the SOC, Driver, OS and System through detailed documentation
Required Skills:
Bachelor’s, Masters or PhD degree in Electrical, Computer Science, related Science or equivalent combination of education, training and experience
14+ years of experience in NPU architecture & development
Hands on experience in developing cycle accurate performance and functional models
Good knowledge and hands on experience in in CNN and LLM models
Proficient programming skills in Python, System C and/or C++
Experience in ML frameworks (TensorFlow, PyTorch, ONNX)
Experience in micro architecture of SoC, interface subsystems, logic modules
Self-motivated problem-solver with an ability to work well in a team
Special Attributes:
Experience in performance/power modeling using Platform Architect
Experience in mapping AI use cases to IPs
Experience with hardware memory managements units, prefetching or memory subsystems
Experience with multi-core systems and memory coherency
Experience in ML model optimization on GPU Architecture
Highly motivated with good verbal and written communication skills
Our total rewards programs are designed to motivate and engage exceptional talent. The base pay range for roles at this level is listed below, but may be higher or lower in other states due to geographic differentials in the labor market. Within the base pay range, individual rates depend on a number of factors—including the role’s function and location as well as the individual’s knowledge, skills, experience, education and training. This is part of our comprehensive compensation package with annual bonus eligibility and generous benefits to help you live life well.
Base Pay Range
$203,700 — $305,500 USD
Additional Information
Disclosure of Trade Secrets
Samsung has a strict policy on trade secrets. In applying to Samsung and progressing through the recruitment process, you must not disclose any trade secrets of a current or previous employer.
Essential Job Functions
This position will be performed in an office setting. The position will require the incumbent to sit and stand at a desk, communicate in person and by telephone, and frequently operate standard office equipment, such as telephones and computers.
Samsung Research America is committed to complying with all Federal, State and local laws related to the employment of qualified individuals with disabilities. If you are an individual with a disability and would like to request a reasonable accommodation as part of the employment selection process, please contact the recruiter or email [email protected].
Equal Employment Opportunity
At Samsung, we believe that innovation and growth are driven by an inclusive culture and a diverse workforce. We aim to create a global team where everyone belongs and has equal opportunities, inspiring our talent to be their true selves. Together, we are building a better tomorrow for our customers, partners, and communities.
Samsung Research America is committed to employing a diverse workforce, and provide Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.
For more information regarding protection from discrimination under Federal law for applicants and employees, please refer to this link: Pay Transparency
Listed on hirly, a job board. hirly is not the employer: Samsung Research America is hiring for this role.
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