hirly

Selinc

Signal and Power Integrity (SIPI) Engineer

Idaho - Boise

See how you match this job — and similar ones. Free.

Upload your resume and hirly scores it against this role at Selinc first, then against similar open jobs, and shows where you fit and why.

PDF or DOCX, up to 12MB. No sign-up to see your matches.

Get past the screening software and onto a recruiter's desk

hirly rewrites your resume for this job — matching the keywords and skills in the posting, moving your most relevant experience to the top, and writing a cover letter to fit. About 30 seconds.

  • Keywords matched to this posting
  • Fit score before you apply
  • Cover letter included

Matched against 2.3M live jobs from 200,000+ employers in 200+ countries.

Tailor my resume for this job →

hirly's read of this role

Seniority
Mid level
Stated salary
$89,400 – $134,100 per year
Country
US
Work mode
On-site / unstated
First seen by hirly
27 Sept 2026

Derived automatically from the posting. Upload your resume above to see how the role scores against it.

the posting

Position Overview

We are seeking a talented Signal Integrity and Power Integrity Engineer to join our hardware engineering team. The ideal candidate will possess strong expertise in SI/PI simulation and analysis, combined with solid fundamentals in circuits, electromagnetics, and hardware design. This role is critical to ensuring the electrical performance and reliability of our next-generation protective relay products.

Key Responsibilities

  • Perform signal integrity and power integrity simulations and analysis for high-speed digital designs
  • Conduct pre-layout and post-layout SI/PI assessments to ensure design compliance with specifications
  • Develop and validate models for signal integrity analysis including IBIS, SPICE, and S-parameter models
  • Collaborate with PCB layout designers to optimize stackup, routing, and power delivery network design
  • Analyze and troubleshoot signal integrity issues such as crosstalk, reflection, impedance discontinuities, and EMI
  • Evaluate power distribution network (PDN) performance including impedance analysis, decoupling strategies, and voltage droop
  • Support hardware validation through correlation of simulation results with measurement data
  • Create design guidelines and best practices for SI/PI optimization
  • Interface with cross-functional teams including hardware design, layout, and product engineers

Required Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or related field (Master's preferred)
  • 3+ years of experience in signal integrity and power integrity analysis and simulation
  • Experience with electromagnetic theory, transmission line theory, and high-speed digital design
  • Proficiency with SI/PI simulation tools (e.g., Ansys HFSS, SIwave, Cadence Sigrity, Keysight ADS, or similar)
  • Experience with SPICE simulation tools (e.g. Ansys Nexxim, Synopsys HSPICE, Cadence Spectre, LTSPICE, or similar)
  • Solid understanding of circuit design fundamentals including analog and digital circuits
  • Strong foundation in hardware design principles and PCB design considerations

Desired Qualifications

  • General modeling and simulation experience for hardware validation and verification
  • Hands-on experience with hardware development lifecycle
  • Experience with IBIS model development and validation
  • Familiarity with S-parameter measurements and VNA operation
  • Knowledge of DDR, PCIe, USB, Ethernet, or other high-speed interface standards
  • Proficiency with scripting languages (i.e. Python) for automation and data analysis
  • Experience correlating simulation results with lab measurements
  • Understanding of EMC/EMI design principles
  • Exposure to thermal simulation and analysis

Key Competencies

  • Strong analytical and problem-solving skills
  • Excellent communication skills with ability to present complex technical concepts clearly
  • Detail-oriented with strong organizational skills
  • Ability to work collaboratively in a cross-functional team environment
  • Self-motivated with ability to manage multiple priorities

Competitive pay. Superior benefits. Inspiring work.

People are at the core of our company and we hire employee-owners. We welcome you to learn more about how we support employees.

  • We’re 100% employee owned. Retirement benefits include an employer funded stock ownership plan (ESOP) and personal 401(k) options.
  • We offer top tier medical, prescription, dental, vision, life, and disability insurance.
  • We recognize the importance of a healthy life balance and offer: 10 paid holidays, annual vacation accrual starting at 12 days, 9 paid sick days, and paid family and medical leave that covers 90% of your pay.
  • We foster growth and development of our employees through avenues such as STEM courses, apprenticeships, tuition assistance, and engineering development programs.
  • Ask our team about other benefits including wellness, fertility, adoption, and flexible spending benefits.

Pay Range Data:

Hardware Engineer - $89,400 - $134,100

Lead Hardware Engineer - $107,600 - $161,500

Development Lead Engineer - $129,200 - $193,900

We are open to reviewing additional candidates with more or less experience and the pay range may differ if filled at a different level. Our pay ranges are determined by job and responsibility. We base our starting pay offer and title on job-related factors such as candidate experience, training, knowledge, and skills.

Communication with Applicants

We communicate with all applicants. If you do not receive a response about your application, please check your SPAM filter or reach out to us at careers@selinc.com .

SEL is an Equal Opportunity Employer: Vets/Disabled.

Original posting on Selinc's site ↗

Want this one?

Upload your resume and hirly rewrites it for this job and writes the cover letter — in about thirty seconds, before you sign up.

Tailor my resume for this job