hirly

AMAT

Sr. Module Engineer, Hybrid Bonding

Santa Clara,CA

See how you match this job — and similar ones. Free.

Upload your resume and hirly scores it against this role at AMAT first, then against similar open jobs, and shows where you fit and why.

PDF or DOCX, up to 12MB. No sign-up to see your matches.

Get past the screening software and onto a recruiter's desk

hirly rewrites your resume for this job — matching the keywords and skills in the posting, moving your most relevant experience to the top, and writing a cover letter to fit. About 30 seconds.

  • Keywords matched to this posting
  • Fit score before you apply
  • Cover letter included
Tailor my resume for this job →

Apply from your AI assistant

Connect hirly to Claude and ask it to apply to this job. hirly tailors your resume, fills the employer’s form and asks before sending. ChatGPT: manual setup today.

Some employer sites stop an application at a CAPTCHA or sign-in and hand it back with a link. Applying needs a paid plan. Works with any assistant that supports MCP.

hirly's read of this role

Seniority
Senior
Stated salary
$147,000 per year
Country
US
Work mode
On-site / unstated
First seen by hirly
3 Oct 2026

Derived automatically from the posting. Upload your resume above to see how the role scores against it.

the posting

Who We Are

Applied Materials is the global leader in materials science and engineering solutions that are at the foundation of virtually every new semiconductor chip and advanced display in the world. The equipment that we create and service is essential to advancing AI and accelerating the commercialization of next-generation semiconductor chips. Join us and push the boundaries of materials science and engineering in a company at the foundation of the electronics industry. The work we do together advances the world’s technology.

What We Offer

Salary:

$147,000.00 - $202,500.00

Location:

Santa Clara,CA

You’ll benefit from a supportive work culture that encourages you to learn, develop, and grow your career as you take on challenges and drive innovative solutions for our customers. We empower our team to push the boundaries of what is possible—while learning every day in a supportive leading global company. Visit our Careers website to learn more.

At Applied Materials, we care about the health and wellbeing of our employees. We’re committed to providing programs and support that encourage personal and professional growth and care for you at work, at home, or wherever you may go. Learn more about our benefits .

As a Process Engineer, you'll play a crucial role in designing and optimizing manufacturing processes for display and semiconductor manufacturing technologies. You will collect and analyze data, perform hardware characterization, and troubleshoot engineering issues. You'll also measure film properties, generate technical documentation, and engage with customers to resolve concerns. Process Engineers collaborate with vendors and suppliers, and become familiar with implementing new technologies and products. You will experiment, learn, and collaborate with some of the brightest minds in the semiconductor and display industries, partnering with our globally recognized R&D teams on state-of-the-art research and development projects.

Position Summary

We are seeking a highly motivated Die-to-Wafer Hybrid Bonding Module Engineer to develop and scale next-generation hybrid bonding technologies for advanced semiconductor packaging applications including Memory , chiplets, AI accelerators, photonics, and heterogeneous integration platforms.

The successful candidate will lead process module development across die preparation, surface activation, die placement, hybrid bonding, post-bond characterization, yield improvement, and manufacturing scale-up. This role requires close collaboration with equipment development teams, process integration engineers, materials scientists, device architects, and external ecosystem partners.

The position is ideal for candidates passionate about enabling future high-bandwidth and energy-efficient computing systems through advanced interconnect technologies. Hybrid bonding technologies including copper-copper and dielectric-dielectric direct bonding are critical enablers for next-generation 3D integration and HBM stacking.

Key Responsibilities

Hybrid Bonding Process Development

  • Develop and optimize die-to-wafer (D2W) hybrid bonding processes for advanced packaging applications.
  • Establish process windows for:
  • Surface preparation
  • Plasma activation
  • Die placement
  • Alignment and overlay control
  • Bonding temperature and pressure optimization
  • Post-bond annealing

Drive Cu-Cu and dielectric-dielectric interconnect formation with focus on electrical performance and reliability.

Process Integration

  • Support integration of hybrid bonding into:
  • Memory architectures
  • Chiplet-based systems
  • Silicon interposers
  • System-on-Wafer platforms
  • Co-packaged optics (CPO)

Collaborate with integration teams to resolve process interactions and yield excursions.

Yield and Defect Reduction

  • Identify root causes of:
  • Bond voids
  • Die shift
  • Overlay errors
  • Non-uniform bonding
  • Particle contamination

Utilize DOE methodologies and statistical process control to improve yield and process robustness.

Metrology and Characterization

  • Drive bonding quality characterization using:
  • CSAM
  • X-ray inspection
  • FIB/SEM
  • AFM
  • Optical metrology
  • Electrical test structures

Develop correlation between process parameters and package performance.

Equipment and Technology Development

  • Work closely with equipment engineering teams on:
  • Hybrid bonding systems
  • Die placement tools
  • Plasma activation modules
  • Surface preparation modules
  • Integrated process control solutions

Participate in evaluation and qualification of next-generation bonding platforms.

Reliability Engineering

  • Define and execute reliability test plans:
  • Thermal cycling
  • HTOL
  • Mechanical pull/shear testing
  • Moisture sensitivity evaluations

Drive failure analysis and corrective actions.

Technical Leadership

  • Lead cross-functional projects from concept through technology transfer.
  • Publish technical results internally and externally.
  • Present development progress to engineering leadership and customers.
  • Mentor junior engineers and researchers.

Minimum Qualifications

Education

  • M.S. in:
  • Materials Science
  • Electrical Engineering
  • Mechanical Engineering
  • Chemical Engineering
  • Physics
  • Semiconductor Manufacturing
  • OR
  • Ph.D. in one of the above disciplines

Experience

  • Minimum 5+ years of semiconductor process development experience after graduate degree.
  • Direct experience in at least one of the following:
  • Hybrid bonding
  • Thermocompression bonding
  • Wafer bonding
  • Advanced packaging
  • HBM development
  • Cu interconnect technology
  • Chiplet integration

Technical Skills

  • Strong understanding of:
  • Cu-Cu interconnect formation
  • Surface chemistry and plasma activation
  • CMP and planarization
  • Defect engineering
  • Semiconductor process integration
  • Statistical process analysis
  • Experience with DOE and JMP/Minitab analysis tools.
  • Familiarity with metrology and failure analysis techniques.

Preferred Qualifications

  • Ph.D. with 5+ years industry experience.
  • Experience in HBM or 3D stacking technologies.
  • Experience with:
  • Hybrid bonding equipment development
  • Direct bonding interconnect (DBI)
  • Die placement systems
  • Advanced packaging process integration
  • Knowledge of AI/HPC packaging architectures.
  • Experience working with 200 mm and 300 mm wafer manufacturing environments.
  • Track record of patents, publications, or conference presentations (ECTC, IEEE, IMAPS, SEMI, etc.).

Desired Personal Attributes

  • Strong technical leadership.
  • Excellent problem-solving skills.
  • Hands-on laboratory mindset.
  • Ability to drive technology from R&D into manufacturing.
  • Effective communicator across engineering, operations, and customer-facing teams.
  • Passion for enabling next-generation AI and high-performance computing platforms.

Additional Information

Time Type:

Full time

Employee Type:

Assignee / Regular

Travel:

Yes, 10% of the Time

Relocation Eligible:

Yes

The salary offered to a selected candidate will be based on multiple factors including location, hire grade, job-related knowledge, skills, experience, and with consideration of internal equity of our current team members. In addition to a comprehensive benefits package, candidates may be eligible for other forms of compensation such as participation in a bonus and a stock award program, as applicable.

For all sales roles, the posted salary range is the Target Total Cash (TTC) range for the role, which is the sum of base salary and target bonus amount at 100% goal achievement.

Applied Materials is an Equal Opportunity Employer. Qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, ancestry, religion, creed, sex, sexual orientation, gender identity, age, disability, veteran or military status, or any other basis prohibited by law.

In addition, Applied endeavors to make our careers site accessible to all users. If you would like to contact us regarding

Original posting on AMAT's site ↗

Listed on hirly, a job board. hirly is not the employer: AMAT is hiring for this role.

Browse similar roles

Want this one?

Upload your resume and hirly rewrites it for this job and writes the cover letter — in about thirty seconds, before you sign up.

Tailor my resume for this job