Sr. Staff/Staff Engineer, Digital Design

About InnoPhase IoT

If you are keen to work with a bunch of brilliant people with various backgrounds, if you share the same value of working smart and celebrating successes, if you have enthusiasm for big technology in a small company, if your goals are to learn and experience different aspects of work--not just singing the same song every day, you’ll find your playground at Innophase IoT.

We are looking for people seeking AWESOMENESS! If you’re good at what you do, you can work anywhere. If you’re the best at what you do, come work at Innophase IoT!

As a Sr. Staff/Staff Digital Design Engineer, you will be working with a team of design engineers to develop novel SoC products for connectivity and communication. You will also be a key contributor to product definition and resulting detailed device performance and functional requirements specifications. In addition to delivering high quality digital solutions, the team supports other disciplines with work product such as Verilog stimulus files, test benches for device bring up/characterization, test vectors for product manufacturing.

Key Responsibilities

Contribute to SoC architecture development for high-performance low-power IoT devices

Employ skills in SystemVerilog, Python, Tcl, UPF to bring designs from concept through architecture to silicon and, finally, high-volume production

Work cross-functionally with Systems/RF/software/firmware/verification/validation/operations teams

Support schedule and resource planning to deliver products to market on time

Help to define digital/system design and implementation methodologies and test strategies and flows

Job Requirements

Theoretical and practical knowledge of SoC architectures employing embedded processors

Familiarity with common bus architectures like AXI/AHB/APB/OBI

Deep RTL design knowledge (SystemVerilog)

Experience with multi-clock and multi-power domain systems and strategies to control and minimize power consumption

Understanding of timing constraints, static timing analysis and timing closure

Experience with Arm TrustZone, device lifecycle states, Secure Boot, and PSA Certified Level 2+ security.

MS/PhD EE/CS preferred

Desirable Skills

You have an engineering mindset, and you believe that communication is key to growing a team stronger

Able to work effectively with incomplete or changing requirements

It is key to unleash the potential in every employee, every team, every leader, and the company herself. We know employees perform best when motivated, appreciated and recognized, and can be themselves. We are committed to building a culture where every voice can be heard, everyone has room for growth and can make meaningful contributions. At the end of the day, we want success not just for the company, but also for everyone who believes in the company, the vision, and the future.